Commit Graph
100 Commits
Author SHA1 Message Date
rubydesign 231ce0f69b improve debug labels 2020-03-26 11:24:33 +02:00
rubydesign 7572e27869 fix operator register usage
which makes inter math work
surprise!
2020-03-25 18:38:32 +02:00
rubydesign bc558d1f0d do not copy name of method
so that the resolve can compare name identity
which is what is does, not equality
this (and some other bug) is crashing arm currently
2020-03-25 12:43:57 +02:00
rubydesign b2dce92883 fix arm return bug
even had a fixme on it
2020-03-24 22:04:44 +02:00
rubydesign 6d2ecf7ee6 disable arm mains tests until debugged 2020-03-22 18:18:07 +02:00
rubydesign 1970a3ee6e test that register allocation allocates risc names 2020-03-22 18:01:51 +02:00
rubydesign bc60f02f66 remove risc tests from rubyx layer
duplication, better ones in slot
2020-03-22 17:47:31 +02:00
rubydesign 90935bfbbc risc is GREEN
totally, man.
Small fix in method missing fixed last block tests
(why, i do not know)
2020-03-22 15:58:19 +02:00
rubydesign 37feba1239 bunch of side effects fixed
makes one think if those are valid asserts
2020-03-22 15:56:57 +02:00
rubydesign ddd1f4e296 fix interpreter syscall and rename return reg
returned int for puts was same name as implicit return  int
2020-03-22 14:31:43 +02:00
rubydesign be684c0c43 move message to stack_pointer
changing a bunch of register names
some of which get names now
2020-03-22 14:31:43 +02:00
rubydesign a93a3c8af5 fix most interpreter tests 2020-03-22 14:31:43 +02:00
rubydesign 06ade75593 Fix non ssa issue
register instances were being shared across instructions
causing the setting to have side-effects
Fixed this by copying the register on write
(fixing the symptom rather than the cause, i'll make an issue)
2020-03-22 14:31:43 +02:00
rubydesign d2e7c647d0 setting registers in the allocator
unfortunately the reg instances are spread across instructions
this causes problems when setting them
2020-03-22 14:31:43 +02:00
rubydesign c890e8402b change in register_names protocol
move to returning the attribute names
getting and setting can then be automated in the base class
2020-03-22 14:31:43 +02:00
rubydesign 0137056b89 change platform to return register names
not just the number of them
also adds protocol to map registers
(like message to r0 , or syscalls)
2020-03-22 14:31:43 +02:00
rubydesign f13e6dcf57 fix releasing in allocator
fell into hash new trap, which reuses the object you give it. not good for mutable objects like the array.
also previous logic was broken in terms of machine vs ssa names
2020-03-22 14:31:43 +02:00
rubydesign 3f131a4018 start with register assigning
have to find a way to set them next
2020-03-22 14:31:43 +02:00
rubydesign 4f290ee246 basic liveliness for allocator 2020-03-22 14:31:43 +02:00
rubydesign d0b734c57c adding register_names to instruction protocol 2020-03-22 14:31:43 +02:00
rubydesign 8df1b8126f add register names to allocator
make platform instantiate it
basic plumbing
2020-03-22 14:31:43 +02:00
rubydesign 500df01425 rename allocator to standard_allocator
planning to have platform dish it out
2020-03-22 14:31:43 +02:00
rubydesign 2e109a16dc starting on risc allocation
inserting allocator stage in method translation
2020-03-22 14:31:43 +02:00
rubydesign d5411c7727 Last risc fixes that are not binary, move binary tests
move test that translate or create binary to own directory, 
for semantic distance (they are the only ones still failing)
2020-03-22 14:31:43 +02:00
rubydesign fea98979e8 Fix comparison bug
Unchanged high level test, ohh how great is testing
2020-03-22 14:31:43 +02:00
rubydesign f03f445652 passing values to macros
conceptually still a bit open, leaving the hack in for now
passing values to the macro instead of sol instances
2020-03-22 14:31:43 +02:00
rubydesign 6366ede8ee check for correct operator
was getting passed sol constants
2020-03-22 14:31:43 +02:00
rubydesign e4a79aac50 reset flags in interpreter
fix at least part of the problem why comparisons dont work
2020-03-22 14:31:43 +02:00
rubydesign 0ed5e74748 Fixing ripples from previous 2020-03-22 14:31:43 +02:00
rubydesign 3ce6ed5263 fix putstring and puts
using syscall regs
2020-03-22 14:31:43 +02:00
rubydesign 17a7f29b0c define and use syscall_XX registers
rather than use hardcoded r0 etc use syscall_X
change the syscalls and interpreter to use them
later use platform to map from syscall_X to actually used register (like r0 in arm)
2020-03-22 14:31:43 +02:00
rubydesign 3b50fee158 fix stray misc in slot 2020-03-22 14:31:43 +02:00
rubydesign 9f609bdb06 fix mod and tests 2020-03-22 14:31:43 +02:00
rubydesign 3a983b4fc8 fix plus, which inherited bugs from operator 2020-03-22 14:31:43 +02:00
rubydesign 7232c28ecd operator also fell into ssa trap
relying on register identity
in fact the whole operator concept was geared towards this, using 2 regs instead of one to avoid the whole issue
better now
2020-03-22 14:31:43 +02:00
rubydesign 3145547315 init fell into the ssa tap, fixed
reducing and assuming the same register, buuh
adds a transfer instruction that can hopefully be removed by analysis
2020-03-22 14:31:43 +02:00
rubydesign 5b0c1195e4 Fix interpreter and resolve method
Interpreter was not handling ssa correctly (ie overwriting)
Resolve was assuming wrong registers (also non ssa)
return value still broken
2020-03-22 14:31:43 +02:00
rubydesign 4db71c1c03 fix all uses of operators now they are ssa 2020-03-22 14:31:43 +02:00
rubydesign 0cde7c1d0a debugging to find operator not being ssa 2020-03-22 14:31:43 +02:00
rubydesign 61fc8a3991 make operator_instruction single ass
create result register automatically
usually not used, but register allocation will sort that
2020-03-22 14:31:43 +02:00
rubydesign 1378745907 first interpreter tests 2020-03-22 14:31:43 +02:00
rubydesign c16ed5ab3a fix interpreter
by currently not checking for old register pattern
feels like wip, but passes (all but one)
2020-03-22 14:31:43 +02:00
rubydesign f2250bc206 fix resolve and introduce method to chop strings to max
strings are 20 bytes. I want to implement the extension idea, just not now
2020-03-22 14:31:43 +02:00
rubydesign 407ca6ef72 misc test fixes 2020-03-22 14:31:43 +02:00
rubydesign 126466e9a9 fixing tests 2020-03-22 14:31:43 +02:00
rubydesign 504fc3509e fix set_internal_word register 2020-03-22 14:31:43 +02:00
rubydesign 5c13ea1433 fix naming mistakes fo Word.get/set macros 2020-03-22 14:31:43 +02:00
rubydesign d125a1528a Fix set_internal_byte registers 2020-03-22 14:31:43 +02:00
rubydesign 2656bfacb2 create a reduce_int on RegisterSlot
that just passes through to RegisterValue by calling to_reg
2020-03-22 14:31:43 +02:00
rubydesign 17a1121408 fix putstring registers 2020-03-22 14:31:43 +02:00
rubydesign 3a3a9277b3 fix operators registers 2020-03-22 14:31:43 +02:00
rubydesign 8867d60c13 fix method_missing register
logic is still wrong, even it is slightly less (at least loading the method name)
2020-03-22 14:31:43 +02:00
rubydesign ede103e73d finally did assert_function_call
for cleaner reading, like all other instruction asserts
2020-03-22 14:31:43 +02:00
rubydesign cf5a3c0102 fix inits registers
surprisingly easy. shorter code and more readable tests
2020-03-22 14:31:43 +02:00
rubydesign 7d8ef8ef64 fix allocate tests
as allocate got one smaller
2020-03-22 14:31:43 +02:00
rubydesign 8abcaa330b fix allocate in builder
which accessed unknown types.
also moved assert_allocate to support
2020-03-22 14:31:43 +02:00
rubydesign c9fedec230 add a way to bend the type for register_value
specifically for factories, where we know the type of next_object even it is not specified
2020-03-22 14:31:43 +02:00
rubydesign 8119030ed2 fix return sequence
broken due to logic error in register_slot << (which was reducing the wrong register, self, not the arg)

Still the sequence is in 2 places, one too many ?
2020-03-22 14:31:43 +02:00
rubydesign 05ddc70fd6 fix get_internal word register names
seems previous commits broke the return
2020-03-22 14:31:43 +02:00
rubydesign 6267bf3ad0 fix slot_to_reg to allow register indexes
we mostly use pre-calculated indexes, ie integers
but registers are allowed (in arm/risc), so we try to check the registers type at least is right.
The return is really a machine word, but we call it Object (yes, more work that way)
2020-03-22 14:31:43 +02:00
rubydesign 62d8d92b50 restrict list index to integer 2020-03-22 14:31:43 +02:00
rubydesign a70e510548 fix test_exit registers 2020-03-22 14:31:43 +02:00
rubydesign fb4fa598f2 fix get_internal_byte
improved operators and tests
some logic errors still
2020-03-22 14:31:43 +02:00
rubydesign a70f63e7bb fix remaining slot instruction tests 2020-03-22 14:31:43 +02:00
rubydesign 07873ce068 fix not same logic
caused by assert logic error, also fixed
2020-03-22 14:31:43 +02:00
rubydesign c1cfc12a1c converted resolve_method
Big, left till last, but surprisingly painless
2020-03-22 14:31:43 +02:00
rubydesign 12fe0b9a10 add constants automatically 2020-03-22 14:31:43 +02:00
rubydesign 28e9cd335a still fixing instruction tests 2020-03-22 14:31:43 +02:00
rubydesign e6729b8b60 fixing instruction tests 2020-03-22 14:31:43 +02:00
rubydesign 22d513d895 fix div4 and tests
also bug in reduce_int, compiler not carried through
2020-03-22 14:31:43 +02:00
rubydesign eed9ba082f Fix div10 and test
fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
rubydesign bd02f69824 reduce_int was overwriting register
No more. But the type question is open, ie what type does the resulting register have
2020-03-22 14:31:43 +02:00
rubydesign 53eb28fff4 load constant to create register names with class
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
2020-03-22 14:31:43 +02:00
rubydesign 3ec5557ddb fix builder logic error
and tests
2020-03-22 14:31:43 +02:00
rubydesign 1760b5b203 fix comparison test and helpers
moving to passing the instruction number, not the instruction
so in the error message we can say where the error is
(otherwise minitest is good enough to supress the trace of asserts calling asserts)
2020-03-22 14:31:43 +02:00
rubydesign 3575aada17 tests for all macros
generated on master (know to work)
but with rXX registers, needs fixing
2020-03-22 14:31:43 +02:00
rubydesign 9c5d17a3bb Fix div10 without method_missing
but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
rubydesign 9a5e0f15cd reannimate infer_type
now with a _purpose_
2020-03-22 14:31:43 +02:00
rubydesign 3688c967d3 Fix comparison macro
which leaves a definite need for instruction level testing
2020-03-22 14:31:43 +02:00
rubydesign 2af953e1d2 last instruciton, dynamic_call
next macros
2020-03-22 14:31:43 +02:00
rubydesign 7f5ebab800 did block yield 2020-03-22 14:31:43 +02:00
rubydesign a4c0b8e5f9 did return sequence
surprisingly easy. also some check polish
2020-03-22 14:31:43 +02:00
rubydesign fd43fc9e5c finally fixes the builder 2020-03-22 14:31:43 +02:00
rubydesign db5a59f735 Unify instruction namings also dirs
Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
2020-03-22 14:31:43 +02:00
rubydesign f3d299208e fix message_setup with new builder 2020-03-22 14:31:43 +02:00
rubydesign d0036ed95b better way to test object registers
also some cleaning, by using more helpers
2020-03-22 14:31:43 +02:00
rubydesign ece1e8c87b fix some more of builder
but still not all. removed some and fixed the register allocation in allocate_int
2020-03-22 14:31:43 +02:00
rubydesign ff49ff50c0 Convert SimpleCall to new regs
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
rubydesign 4b303977a7 Fix first Slot instruction that uses builder
now without method_missing and names
but still with instance_eval, hmm. Tried without, makes code much less readable
2020-03-22 14:31:43 +02:00
rubydesign 4888b3b6db Starting to rework slot instructions that create risc
have to go through all and all macros and all thems tests. What did the wise man say: one step at a time
2020-03-22 14:31:43 +02:00
rubydesign 4643be0ae6 codong RegisterSlot with reg and slot 2020-03-22 14:31:43 +02:00
rubydesign 64d860b2bf create a load on the compiler
thus removing the need for << with objects on RegisterValue
2020-03-22 14:31:43 +02:00
rubydesign 95f3eec043 repurpose RValue as RegisterSlot
with the idea of the better name came also the one about not needing the builder anymore
2020-03-22 14:31:43 +02:00
rubydesign 088017bc05 SA for Slotted derivations
Object and Constant similarity are coming more into focus. Will unite after the merge
2020-03-22 14:31:43 +02:00
rubydesign d22da1ab97 SA for slot_to_reg 2020-03-22 14:31:43 +02:00
rubydesign 77003eed06 remove use_reg on compiler and SA for load 2020-03-22 14:31:43 +02:00
rubydesign 0ce14bdfd1 moving to SA register names (wip)
starting to implement register allocation by first creating SA
Single Assignment means a register is only every assigned a value once. Hence for any operation involving another register, a new register is created.
We do this with a naming scheme for the registers in dot notation (as it would be in c) which means 2 registers with the same name, should have the same contents. This does not apply to temporaries, but that is another day.
Starting WIP now, and will create many red commits before merging when green.
2020-03-22 14:31:43 +02:00
rubydesign f2c853821c First version of BeginnersGuide and other doc changes 2020-03-21 19:02:02 +02:00
rubydesign a40d8f2e8c update ffi for 2.7 2020-03-21 12:41:56 +02:00
rubydesign 887d7b9bbb replace fake compiler with real
less room for error
2020-02-28 12:54:17 +02:00