fix all uses of operators now they are ssa

This commit is contained in:
Torsten 2020-03-14 12:47:29 +02:00
parent 0cde7c1d0a
commit 4db71c1c03
13 changed files with 49 additions and 47 deletions

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@ -186,9 +186,11 @@ module Risc
# create operator instruction for self and add
# doesn't read quite as smoothly as one would like, but better than the compiler version
def op( operator , right)
# result, the third paraameter, may be nil, in which case a register will be generated
# (off coourse using the third parameter makes it look even worse TBC)
def op( operator , right , result = nil)
right = right.to_reg() if(right.is_a?(RegisterSlot))
ret = Risc.op( "operator #{operator}" , operator , self , right)
ret = Risc.op( "operator #{operator}" , operator , self , right , result)
compiler.add_code(ret) if compiler
ret
end

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@ -14,47 +14,47 @@ module SlotMachine
load_object( 1 , integer_const)
integer_1.op :>> , integer_const
integer_1.op :>> , integer_const , integer_1
integer_const << 2
integer_reg.op :>> , integer_const
integer_reg.op :+ , integer_1
integer_reg.op :>> , integer_const, integer_reg
integer_reg.op :+ , integer_1, integer_reg
integer_const << 4
integer_1 << integer_reg
integer_reg.op :>> , integer_1
integer_reg.op :>> , integer_1, integer_reg
integer_reg.op :+ , integer_1
integer_reg.op :+ , integer_1, integer_reg
integer_const << 8
integer_1 << integer_reg
integer_1.op :>> , integer_const
integer_1.op :>> , integer_const, integer_1
integer_reg.op :+ , integer_1
integer_reg.op :+ , integer_1, integer_reg
integer_const << 16
integer_1 << integer_reg
integer_1.op :>> , integer_const
integer_1.op :>> , integer_const, integer_1
integer_reg.op :+ , integer_1
integer_reg.op :+ , integer_1, integer_reg
integer_const << 3
integer_reg.op :>> , integer_const
integer_reg.op :>> , integer_const, integer_reg
integer_const << 10
integer_1 << integer_reg
integer_1.op :* , integer_const
integer_1.op :* , integer_const, integer_1
integer_self.op :- , integer_1
integer_self.op :- , integer_1, integer_self
integer_1 << integer_self
integer_const << 6
integer_1.op :+ , integer_const
integer_1.op :+ , integer_const, integer_1
integer_const << 4
integer_1.op :>> , integer_const
integer_1.op :>> , integer_const, integer_1
integer_reg.op :+ , integer_1
integer_reg.op :+ , integer_1, integer_reg
integer_tmp[Parfait::Integer.integer_index] << integer_reg
message[:return_value] << integer_tmp

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@ -8,8 +8,8 @@ module SlotMachine
builder.build do
integer_self = message[:receiver].reduce_int(false)
load_object( 2 , integer_1)
integer_self.op :>> , integer_1
integer_tmp[Parfait::Integer.integer_index] << integer_self
result = integer_self.op :>> , integer_1
integer_tmp[Parfait::Integer.integer_index] << result.result
message[:return_value] << integer_tmp
end
return compiler

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@ -52,11 +52,11 @@ module Risc
end
def test_operator
ret = @r0.op :<< , @r1
assert_operator ret , :<< , :message , "id_"
assert_operator ret , :<< , :message , "id_" , "op_<<_"
end
def test_operator_slot
ret = @r0.op :<< , @r1[:type]
assert_operator ret , :<< , :message , "id_.type"
assert_operator ret , :<< , :message , "id_.type" , "op_<<_"
end
def test_byte_to_reg
instr = @r0 <= @r1[@r0]

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@ -17,7 +17,7 @@ module SlotMachine
assert_slot_to_reg 2,:message , 1 , :"message.next_message"
end
def test_3_op
assert_operator 3, :-, :"message.caller" , :"message.next_message"
assert_operator 3, :-, :"message.caller" , :"message.next_message" , "op_-_"
end
def test_4_zero
assert_zero 4, "target"

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@ -32,7 +32,7 @@ module SlotMachine
assert_load 6, Parfait::NilClass , "id_nilclass_"
end
def test_7_check_nil
assert_operator 7, :- , "id_nilclass_" , "id_cacheentry_.cached_type.methods"
assert_operator 7, :- , "id_nilclass_" , "id_cacheentry_.cached_type.methods" , "op_-_"
end
def test_8_nil_branch
assert_zero 8, "exit_label_"
@ -41,7 +41,7 @@ module SlotMachine
assert_slot_to_reg 9, "id_cacheentry_.cached_type.methods" , 6 , "id_cacheentry_.cached_type.methods.name"
end
def test_10_check_name
assert_operator 10, :- , "id_cacheentry_.cached_type.methods.name" , "id_word_"
assert_operator 10, :- , "id_cacheentry_.cached_type.methods.name" , "id_word_" , "op_-_"
end
def test_11_nil_branch
assert_zero 11, "ok_label_"

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@ -18,7 +18,7 @@ module SlotMachine
assert_slot_to_reg 2,:message , 1 , :"message.next_message"
end
def test_3_op
assert_operator 3, :- , "message.caller" , "message.next_message"
assert_operator 3, :- , "message.caller" , "message.next_message" , "op_-_"
end
def test_4_not_zero
assert_not_zero 4 , "target"

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@ -17,7 +17,7 @@ module SlotMachine
assert_load 2, Parfait::FalseClass, "id_"
end
def test_3_op
assert_operator 3, :- , "id_" , "message.caller"
assert_operator 3, :- , "id_" , "message.caller" , "op_-_"
end
def test_4_zero
assert_zero 4 , "target"
@ -26,7 +26,7 @@ module SlotMachine
assert_load 5, Parfait::NilClass , "id_"
end
def test_6_op
assert_operator 6, :- , "id_", "message.caller"
assert_operator 6, :- , "id_", "message.caller" , "op_-_"
end
def test_7_zero
assert_zero 7 , "target"

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@ -36,7 +36,7 @@ module SlotMachine
assert_slot_to_reg 2 , "message.receiver" , 2 , "message.receiver.data_1"
assert_slot_to_reg 3 ,:message , 9 , "message.arg1"
assert_slot_to_reg 4 , "message.arg1" , 2 , "message.arg1.data_1"
assert_operator 5 , :- , "message.receiver.data_1" , "message.arg1.data_1"
assert_operator 5 , :- , "message.receiver.data_1" , "message.arg1.data_1" ,"op_-_"
assert_minus 6 , "false_label_"
assert_not_zero 7 , "false_label_"
assert_load 8 , Parfait::TrueClass , :result

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@ -29,34 +29,34 @@ module SlotMachine
assert_transfer a + 3 , "message.receiver.data_1" , "integer_1"
assert_transfer a + 4 , "message.receiver.data_1" , "integer_reg"
assert_data a + 5 , 1
assert_operator a + 6 , :>> , :integer_1 , :integer_const
assert_operator a + 6 , :>> , :integer_1 , :integer_const , :integer_1
assert_data a + 7 , 2
assert_operator a + 8 , :>> , :integer_reg , :integer_const
assert_operator a + 9 , :+ , :integer_reg , :integer_1
assert_operator a + 8 , :>> , :integer_reg , :integer_const , :integer_reg
assert_operator a + 9 , :+ , :integer_reg , :integer_1 , :integer_reg
assert_data a + 10 , 4
assert_transfer a + 11 , :integer_reg , :integer_1
assert_operator a + 12 , :>> , :integer_reg , :integer_1
assert_operator a + 13 , :+ , :integer_reg , :integer_1
assert_operator a + 12 , :>> , :integer_reg , :integer_1 , :integer_reg
assert_operator a + 13 , :+ , :integer_reg , :integer_1 , :integer_reg
assert_data a + 14 , 8
assert_transfer a + 15 , :integer_reg , :integer_1
assert_operator a + 16 , :>> , :integer_1 , :integer_const
assert_operator a + 17 , :+ , :integer_reg , :integer_1
assert_operator a + 16 , :>> , :integer_1 , :integer_const , :integer_1
assert_operator a + 17 , :+ , :integer_reg , :integer_1 , :integer_reg
assert_data a + 18 , 16
assert_transfer a + 19 , :integer_reg , :integer_1
assert_operator a + 20 , :>> , :integer_1 , :integer_const
assert_operator a + 21 , :+ , :integer_reg , :integer_1
assert_operator a + 20 , :>> , :integer_1 , :integer_const , :integer_1
assert_operator a + 21 , :+ , :integer_reg , :integer_1 , :integer_reg
assert_data a + 22 , 3
assert_operator a + 23 , :>> , :integer_reg , :integer_const
assert_operator a + 23 , :>> , :integer_reg , :integer_const , :integer_reg
assert_data a + 24 , 10
assert_transfer a + 25 , :integer_reg , :integer_1
assert_operator a + 26 , :* , :integer_1 , :integer_const
assert_operator a + 27 , :- , "message.receiver.data_1" , :integer_1
assert_operator a + 26 , :* , :integer_1 , :integer_const , :integer_1
assert_operator a + 27 , :- , "message.receiver.data_1" , :integer_1 , "message.receiver.data_1"
assert_transfer a + 28 , "message.receiver.data_1" , :integer_1
assert_data a + 29 , 6
assert_operator a + 30 , :+ , :integer_1 , :integer_const
assert_operator a + 30 , :+ , :integer_1 , :integer_const , :integer_1
assert_data a + 31 , 4
assert_operator a + 32 , :>> , :integer_1 , :integer_const
assert_operator a + 33 , :+ , :integer_reg , :integer_1
assert_operator a + 32 , :>> , :integer_1 , :integer_const , :integer_1
assert_operator a + 33 , :+ , :integer_reg , :integer_1 , :integer_reg
assert_reg_to_slot a + 34 , :integer_reg , "id_factory_.next_object" , 2
assert_reg_to_slot a + 35 , "id_factory_.next_object" , :message , 5
assert_slot_to_reg a + 36 ,:message , 5 , "message.return_value"

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@ -28,8 +28,8 @@ module SlotMachine
assert_slot_to_reg a + 1 , :message , 2 , "message.receiver"
assert_slot_to_reg a + 2 , "message.receiver" , 2 , "message.receiver.data_1"
assert_data a + 3 , 2
assert_operator a + 4 , :>> , "message.receiver.data_1" , :integer_1
assert_reg_to_slot a + 5 ,"message.receiver.data_1" , "id_factory_.next_object" , 2
assert_operator a + 4 , :>> , "message.receiver.data_1" , :integer_1 ,"op_>>_"
assert_reg_to_slot a + 5 ,"op_>>_" , "id_factory_.next_object" , 2
assert_reg_to_slot a + 6 ,"id_factory_.next_object" , :message , 5
assert_slot_to_reg a + 7 , :message , 5 , "message.return_value"
assert_reg_to_slot a + 8 , "message.return_value" , :message , 5

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@ -40,7 +40,7 @@ module SlotMachine
assert_slot_to_reg s + 2 ,"message.receiver" , 2 , "message.receiver.data_1"
assert_slot_to_reg s + 3 ,:message , 9 , "message.arg1"
assert_slot_to_reg s + 4 , "message.arg1" , 2 , "message.arg1.data_1"
assert_operator s + 5 , :| , "message.receiver.data_1" , "message.arg1.data_1"
assert_operator s + 5 , :| , "message.receiver.data_1" , "message.arg1.data_1" , "op_|_"
assert_reg_to_slot s + 6 , "message.receiver.data_1" , "id_factory_.next_object" , 2
assert_reg_to_slot s + 7 , "id_factory_.next_object" , :message , 5
assert_slot_to_reg s + 8 ,:message , 5 , "message.return_value"

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@ -158,7 +158,7 @@ module Minitest
assert_load 1 , Parfait::Factory , "id_factory_"
assert_load 2 , Parfait::NilClass , "id_nilclass_"
assert_slot_to_reg 3 , "id_factory_" , 2 , "id_factory_.next_object"
assert_operator 4 , :- , "id_nilclass_" , "id_factory_.next_object"
assert_operator 4 , :- , "id_nilclass_" , "id_factory_.next_object" , "op_-_"
assert_not_zero 5 , "cont_label"
assert_slot_to_reg 6 , "id_factory_" , 3 , "id_factory_.reserve"
assert_reg_to_slot 7 , "id_factory_.reserve" , "id_factory_" , 2