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fix div4 and tests

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also bug in reduce_int, compiler not carried through
This commit is contained in:
Torsten 2020-03-08 12:14:53 +02:00
parent eed9ba082f
commit 22d513d895
4 changed files with 16 additions and 14 deletions
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2
lib/risc/register_value.rb
View File

@ -71,7 +71,7 @@ module Risc
def reduce_int(check = true)
raise "type not int #{type.name}" if check && type.name != "Integer_Type"
new_name = "#{@symbol}.data_1"
new_reg = RegisterValue.new( new_name.to_sym , :Integer , extra)
new_reg = RegisterValue.new( new_name.to_sym , :Integer , extra).set_compiler(compiler)
reduce = Risc::SlotToReg.new( "int -> fix" , self , Parfait::Integer.integer_index , new_reg)
compiler.add_code(reduce) if compiler
reduce.register

7
lib/slot_machine/macro/div4.rb
View File

@ -3,10 +3,11 @@ module SlotMachine
def to_risc(compiler)
builder = compiler.builder(compiler.source)
integer_tmp = builder.allocate_int
integer_1 = builder.register( :integer_1 )
integer_self = builder.register( :integer_self )
builder.build do
integer_self! << message[:receiver]
integer_self.reduce_int
integer_1! << 2
integer_self = message[:receiver].to_reg.reduce_int(false)
load_object( 2 , integer_1)
integer_self.op :>> , integer_1
integer_tmp[Parfait::Integer.integer_index] << integer_self
message[:return_value] << integer_tmp

1
test/risc/test_register_value1.rb
View File

@ -20,6 +20,7 @@ module Risc
def test_reduce_int
ins = @int.reduce_int
assert_equal RegisterValue , ins.class
assert ins.compiler
assert_equal SlotToReg , @compiler.current.class
assert_equal Parfait::Integer.integer_index , @compiler.current.index
assert_equal :"id_456.data_1" , ins.symbol

20
test/slot_machine/macro/test_div4.rb
View File

@ -15,7 +15,7 @@ module SlotMachine
assert_equal :div4 , @method.callable.name
end
def test_risc_length
assert_equal 41 , @method.to_risc.risc_instructions.length
assert_equal 40 , @method.to_risc.risc_instructions.length
end
def test_allocate
assert_allocate
@ -24,15 +24,15 @@ module SlotMachine
assert_return(32)
end
def test_all
assert_slot_to_reg risc(23) , :r0 , 2 , :r2
assert_slot_to_reg risc(24) , :r2 , 2 , :r2
assert_data risc(25) , 2
assert_operator risc(26) , :>> , :r2 , :r3
assert_reg_to_slot risc(27) ,:r2 , :r1 , 2
assert_reg_to_slot risc(28) ,:r1 , :r0 , 5
assert_slot_to_reg risc(29) , :r0 , 5 , :r2
assert_reg_to_slot risc(30) ,:r2 , :r0 , 5
assert_branch risc(31) , "return_label"
assert_slot_to_reg 23 , :message , 2 , "message.receiver"
assert_slot_to_reg 24 , "message.receiver" , 2 , "message.receiver.data_1"
assert_data 25 , 2
assert_operator 26 , :>> , "message.receiver.data_1" , :integer_1
assert_reg_to_slot 27 ,"message.receiver.data_1" , "id_factory_.next_object" , 2
assert_reg_to_slot 28 ,"id_factory_.next_object" , :message , 5
assert_slot_to_reg 29 , :message , 5 , "message.return_value"
assert_reg_to_slot 30 , "message.return_value" , :message , 5
assert_branch 31 , "return_label"
end
end
end