fix test_exit registers

This commit is contained in:
Torsten 2020-03-09 12:48:47 +02:00
parent fb4fa598f2
commit a70e510548
4 changed files with 24 additions and 18 deletions

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@ -17,8 +17,8 @@ module SlotMachine
merge_label = Risc.label("merge" , "merge_label_#{object_id}")
result = Risc::RegisterValue.new(:result , :Object)
builder.build do
left = message[:receiver].to_reg.reduce_int
right = message[:arg1].to_reg.reduce_int
left = message[:receiver].to_reg.reduce_int(false) #false == hack
right = message[:arg1].to_reg.reduce_int(false)
if(operator.to_s.start_with?('<') )
right.op :- , left

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@ -16,7 +16,6 @@ module SlotMachine
def test_risc_length
assert_equal 25 , @method.to_risc.risc_instructions.length
end
#TODO, check the actual instructions, at least by class
end
class TestIntComp2Risc < BootTest
def setup
@ -34,12 +33,12 @@ module SlotMachine
end
def test_all
assert_slot_to_reg 1 , :message , 2 , "message.receiver"
assert_slot_to_reg 2 , "message.receiver" , 2 , "message.receiver"
assert_slot_to_reg 2 , "message.receiver" , 2 , "message.receiver.data_1"
assert_slot_to_reg 3 ,:message , 9 , "message.arg1"
assert_slot_to_reg 4 , "message.arg1" , 2 , "message.arg1"
assert_operator 5 , :- , "message.receiver" , "message.arg1"
assert_slot_to_reg 4 , "message.arg1" , 2 , "message.arg1.data_1"
assert_operator 5 , :- , "message.receiver.data_1" , "message.arg1.data_1"
assert_minus 6 , "false_label_"
assert_zero 7 , "false_label_"
assert_not_zero 7 , "false_label_"
assert_load 8 , Parfait::TrueClass , :result
assert_branch 9 , "merge_label_"
assert_label 10 , "false_label_"

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@ -15,22 +15,21 @@ module SlotMachine
assert_equal Risc::MethodCompiler , @method.to_risc.class
end
def test_risc_length
assert_equal 40 , @method.to_risc.risc_instructions.length
assert_equal 39 , @method.to_risc.risc_instructions.length
end
def test_allocate
assert_allocate
end
def test_all
assert_reg_to_slot risc(23) , :r1 , :r0 , 5
assert_transfer risc(24) , :r0 , :r8
assert_slot_to_reg risc(25),:r0 , 5 , :r0
assert_slot_to_reg risc(26),:r0 , 2 , :r0
assert_equal Risc::Syscall, risc(27).class
assert_equal :exit , risc(27).name
assert_slot_to_reg risc(28),:r0 , 5 , :r2
assert_reg_to_slot risc(29) , :r2 , :r0 , 5
assert_branch risc(30) , "return_label"
assert_label risc(31) , "return_label"
assert_reg_to_slot 23 , "id_factory_.next_object" , :message , 5
assert_transfer 24 , :message , :saved_message
assert_slot_to_reg 25 ,:message , 5 , :message
assert_slot_to_reg 26 ,:message , 2 , "message.data_1"
assert_syscall 27 , :exit
assert_slot_to_reg 28 ,:message , 5 , "message.return_value"
assert_reg_to_slot 29 , "message.return_value" , :message , 5
assert_branch 30 , "return_label"
assert_label 31 , "return_label"
end
def test_return
assert_return(31)

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@ -1,4 +1,12 @@
module Risc
module HasCompiler
def risc(i)
assert @compiler , "no compiler"
instructions = @compiler.risc_instructions
return instructions if i == 0
instructions.next(i)
end
end
class FakeCallable
def self_type
Parfait.object_space.types.values.first