500df01425
rename allocator to standard_allocator
...
planning to have platform dish it out
2020-03-22 14:31:43 +02:00
2e109a16dc
starting on risc allocation
...
inserting allocator stage in method translation
2020-03-22 14:31:43 +02:00
3ce6ed5263
fix putstring and puts
...
using syscall regs
2020-03-22 14:31:43 +02:00
7232c28ecd
operator also fell into ssa trap
...
relying on register identity
in fact the whole operator concept was geared towards this, using 2 regs instead of one to avoid the whole issue
better now
2020-03-22 14:31:43 +02:00
4db71c1c03
fix all uses of operators now they are ssa
2020-03-22 14:31:43 +02:00
61fc8a3991
make operator_instruction single ass
...
create result register automatically
usually not used, but register allocation will sort that
2020-03-22 14:31:43 +02:00
c9fedec230
add a way to bend the type for register_value
...
specifically for factories, where we know the type of next_object even it is not specified
2020-03-22 14:31:43 +02:00
fb4fa598f2
fix get_internal_byte
...
improved operators and tests
some logic errors still
2020-03-22 14:31:43 +02:00
22d513d895
fix div4 and tests
...
also bug in reduce_int, compiler not carried through
2020-03-22 14:31:43 +02:00
bd02f69824
reduce_int was overwriting register
...
No more. But the type question is open, ie what type does the resulting register have
2020-03-22 14:31:43 +02:00
3688c967d3
Fix comparison macro
...
which leaves a definite need for instruction level testing
2020-03-22 14:31:43 +02:00
f3d299208e
fix message_setup with new builder
2020-03-22 14:31:43 +02:00
ff49ff50c0
Convert SimpleCall to new regs
...
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
4888b3b6db
Starting to rework slot instructions that create risc
...
have to go through all and all macros and all thems tests. What did the wise man say: one step at a time
2020-03-22 14:31:43 +02:00
4643be0ae6
codong RegisterSlot with reg and slot
2020-03-22 14:31:43 +02:00
64d860b2bf
create a load on the compiler
...
thus removing the need for << with objects on RegisterValue
2020-03-22 14:31:43 +02:00
95f3eec043
repurpose RValue as RegisterSlot
...
with the idea of the better name came also the one about not needing the builder anymore
2020-03-22 14:31:43 +02:00
0ce14bdfd1
moving to SA register names (wip)
...
starting to implement register allocation by first creating SA
Single Assignment means a register is only every assigned a value once. Hence for any operation involving another register, a new register is created.
We do this with a naming scheme for the registers in dot notation (as it would be in c) which means 2 registers with the same name, should have the same contents. This does not apply to temporaries, but that is another day.
Starting WIP now, and will create many red commits before merging when green.
2020-03-22 14:31:43 +02:00
21817b182e
Start to make slots recursive
2020-02-17 14:26:50 +07:00
89f32ed74a
Changing the call setup and return to be more efficient
...
Now we are using a statically linked list of messages. This will not work with procs, but that can be solved then.
Previous (wrong) thinking was that because of procs messages have to be allocated for every call. This was too slow, and not neccessary
2019-08-23 15:30:27 +03:00
7ca3599c5a
Fixed all after changing argument handling
...
arguments are now fully inlined into the message
locals next
2019-08-22 23:10:29 +03:00
Torsten Ruger
8d3a1954fa
close #21
...
Mostly replaced Fixnum with integer
also in the rx-file dependency
all travis and testing with 2.4+
2019-02-07 18:24:35 +02:00
Torsten Ruger
dc12c1d70b
add the addresses from labels as constants
2018-08-29 21:06:29 +03:00
Torsten Ruger
57dc6c45bb
remove the code_builder
...
this is core of #11
rename compiler_builder to just builder
and change all builder uses to use that
some test change as code is not returned anymore
2018-08-19 13:16:07 +03:00
Torsten Ruger
e953cc90d5
remove some more add_xx functions
...
also load labels by dsl now
2018-08-14 20:24:48 +03:00
Torsten Ruger
520dc7b41f
remove ad_transfer in save_message
...
towards removing all add_
change to set_builder and chaining in reg values
2018-08-14 20:08:58 +03:00
Torsten Ruger
99a95d40a6
also redid the get/set internal byte with builder
...
had to pimp register value to use a semblance of the dsl
using <= for bytes and << for words
2018-08-09 20:16:55 +03:00
Torsten Ruger
78466090b3
add reduce_int and fix bug
...
hardcoded operator, buh
reduce_int to avoid that long constant
2018-08-08 15:49:07 +03:00
Torsten Ruger
6200a35562
add shortcut for class_name
...
for when type is not set
2018-08-08 12:02:59 +03:00
Torsten Ruger
c63e55c2bc
add an operator function
...
to be able to use the builder more
also add ability to load fixnums (for the int functions)
2018-08-07 20:48:36 +03:00
Torsten Ruger
595e032edf
add function_return helper to risc_value
...
create a function_return from within builder
2018-08-06 13:03:33 +03:00
Torsten Ruger
1cb07a4164
block arg access was off by one
2018-07-27 12:16:06 +03:00
Torsten Ruger
ff8b95f21a
get block resolution to use the extra
...
block_compiler puts in the extra, that we get out when resolving the type
Thus block args work, though only by assuming direct call
2018-07-17 10:37:33 +03:00
Torsten Ruger
3343017dba
move type resolution to compiler
...
from risc_value.
also unite mock compilers
2018-07-16 11:46:18 +03:00
Torsten Ruger
e3673e579c
pass extra info into register init, not just value
...
extra info may be hash, maybe just type info
2018-07-16 11:23:09 +03:00
Torsten Ruger
f31d22d901
use real type in register, not symbol
...
this has some more consequences, upcoming
2018-07-15 15:16:12 +03:00
Torsten Ruger
58c7294abd
finish the loop in slot_load
...
thus rewrite of that old nested if thing is done
2018-07-14 11:04:21 +03:00
Torsten Ruger
61c840c023
start to move slot_load code to register_value
...
the iea is to iterate through register_values while reducing the slot_load to a number of Slot_to_regs
wip
2018-07-13 21:56:55 +03:00
Torsten Ruger
d50893bb0f
rename risc_value to register_value
...
almost to register, but it still carries that value
2018-06-29 11:39:07 +03:00
Torsten Ruger
e396807ee5
start work on dsl
...
so i can read my own code
2018-04-06 14:21:38 +03:00
Torsten Ruger
f09086e524
unite the two resolve_to_index functions
2018-04-05 20:10:00 +03:00
Torsten Ruger
a306c464b7
start using tmp registers at 1
...
which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
9c052c78a7
fix most of slot_load to_risc
...
higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
cddc25a595
fixing tests for shifting constants into slots
2018-03-17 21:15:38 +05:30
Torsten Ruger
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
