also redid the get/set internal byte with builder
had to pimp register value to use a semblance of the dsl using <= for bytes and << for words
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@ -21,15 +21,16 @@ module Risc
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# return (and word sized int) is stored in return_value
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def get_internal_byte( context)
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compiler = compiler_for(:Word , :get_internal_byte , {at: :Integer})
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source = "get_internal_byte"
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builder = compiler.compiler_builder(compiler.source)
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me , index = builder.self_and_int_arg(source)
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builder.reduce_int( source + " fix arg", index )
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# reduce me to me[index]
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builder.add_byte_to_reg( source , me , index , me)
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builder.add_new_int(source, me , index)
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# and put it back into the return value
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builder.add_reg_to_slot( source , index , Risc.message_reg , :return_value)
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compiler.compiler_builder(compiler.source).build do
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object << message[:receiver]
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integer << message[:arguments]
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integer << integer[1]
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integer.reduce_int
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object <= object[integer]
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add_new_int("get_internal_byte", object , integer)
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message[:return_value] << integer
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end
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compiler.add_mom( Mom::ReturnSequence.new)
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return compiler
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end
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@ -39,15 +40,18 @@ module Risc
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# return self
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def set_internal_byte( context )
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compiler = compiler_for(:Word, :set_internal_byte , {at: :Integer , :value => :Integer} )
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source = "set_internal_byte"
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builder = compiler.compiler_builder(compiler.source)
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me , index = builder.self_and_int_arg(source)
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value = builder.load_int_arg_at(source , 1 )
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builder.reduce_int( source + " fix me", value )
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builder.reduce_int( source + " fix arg", index )
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builder.add_reg_to_byte( source , value , me , index)
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value = builder.load_int_arg_at(source , 1 )
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builder.add_reg_to_slot( source , value , Risc.message_reg , :return_value)
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compiler.compiler_builder(compiler.source).build do
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word << message[:receiver]
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integer << message[:arguments]
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integer << integer[1]
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integer_reg << message[:arguments]
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integer_obj << integer_reg[2]
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integer_reg << integer_reg[2]
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integer.reduce_int
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integer_reg.reduce_int
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word[integer] <= integer_reg
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message[:return_value] << integer_obj
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end
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compiler.add_mom( Mom::ReturnSequence.new)
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return compiler
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end
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@ -140,6 +140,15 @@ module Risc
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return ins
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end
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# similar to above (<< which produces slot_to_reg), this produces byte_to_reg
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# since << covers all other cases, this must have a RValue as the right
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def <=( right )
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raise "not implemented for #{right.class}:#{right}" unless right.is_a?( RValue )
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ins = Risc.byte_to_reg("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , right.index , self)
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builder.add_code(ins) if builder
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return ins
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end
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def -( right )
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raise "operators only on registers, not #{right.class}" unless right.is_a? RegisterValue
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op = Risc.op("#{self.type} - #{right.type}", :- , self , right )
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@ -187,6 +196,15 @@ module Risc
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reg_to_slot
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end
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# similar to above (<< which produces reg_to_slot), this produces reg_to_byte
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# from itself (the slot) and the register given
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def <=( reg )
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raise "not reg #{reg}" unless reg.is_a?(RegisterValue)
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reg_to_byte = Risc.reg_to_byte("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg , register, index)
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builder.add_code(reg_to_byte) if builder
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reg_to_byte
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end
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end
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# The register we use to store the current message object is :r0
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@ -18,19 +18,19 @@ module Risc
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SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
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RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot,
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SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
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SlotToReg, SlotToReg, SlotToReg, SlotToReg, RegToByte,
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SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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Branch, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
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SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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RegToSlot, Branch, SlotToReg, SlotToReg, Branch,
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RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
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SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
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SlotToReg, SlotToReg, Branch, Syscall, NilClass]
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SlotToReg, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
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RegToByte, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
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Branch, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
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SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
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SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
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Branch, SlotToReg, SlotToReg, Branch, RegToSlot,
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LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
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SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg,
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SlotToReg, Branch, Syscall, NilClass]
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assert_equal "K".ord , get_return
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end
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def test_reg_to_byte
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done = main_ticks(40)
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done = main_ticks(41)
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assert_equal RegToByte , done.class
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assert_equal "K".ord , @interpreter.get_register(done.register)
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end
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@ -59,6 +59,13 @@ module Risc
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assert_equal @r1 , ret.right
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assert_equal :<< , ret.operator
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end
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def test_byte_to_reg
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instr = @r0 <= @r1[1]
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assert_equal ByteToReg , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 1 , instr.index
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end
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def test_slot_to_reg
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instr = @r0 << @r1[:next_message]
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assert_equal SlotToReg , instr.class
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@ -66,6 +73,13 @@ module Risc
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assert_equal @r0 , instr.register
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assert_equal 3 , instr.index
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end
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def test_reg_to_byte
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instr = @r1[1] <= @r0
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assert_equal RegToByte , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 1 , instr.index
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end
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def test_reg_to_slot
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instr = @r1[:next_message] << @r0
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assert_equal RegToSlot , instr.class
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