also redid the get/set internal byte with builder

had to pimp register value to use a semblance of the dsl
using <= for bytes and << for words
This commit is contained in:
Torsten Ruger 2018-08-09 20:16:55 +03:00
parent 7002956e81
commit 99a95d40a6
4 changed files with 64 additions and 28 deletions

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@ -21,15 +21,16 @@ module Risc
# return (and word sized int) is stored in return_value
def get_internal_byte( context)
compiler = compiler_for(:Word , :get_internal_byte , {at: :Integer})
source = "get_internal_byte"
builder = compiler.compiler_builder(compiler.source)
me , index = builder.self_and_int_arg(source)
builder.reduce_int( source + " fix arg", index )
# reduce me to me[index]
builder.add_byte_to_reg( source , me , index , me)
builder.add_new_int(source, me , index)
# and put it back into the return value
builder.add_reg_to_slot( source , index , Risc.message_reg , :return_value)
compiler.compiler_builder(compiler.source).build do
object << message[:receiver]
integer << message[:arguments]
integer << integer[1]
integer.reduce_int
object <= object[integer]
add_new_int("get_internal_byte", object , integer)
message[:return_value] << integer
end
compiler.add_mom( Mom::ReturnSequence.new)
return compiler
end
@ -39,15 +40,18 @@ module Risc
# return self
def set_internal_byte( context )
compiler = compiler_for(:Word, :set_internal_byte , {at: :Integer , :value => :Integer} )
source = "set_internal_byte"
builder = compiler.compiler_builder(compiler.source)
me , index = builder.self_and_int_arg(source)
value = builder.load_int_arg_at(source , 1 )
builder.reduce_int( source + " fix me", value )
builder.reduce_int( source + " fix arg", index )
builder.add_reg_to_byte( source , value , me , index)
value = builder.load_int_arg_at(source , 1 )
builder.add_reg_to_slot( source , value , Risc.message_reg , :return_value)
compiler.compiler_builder(compiler.source).build do
word << message[:receiver]
integer << message[:arguments]
integer << integer[1]
integer_reg << message[:arguments]
integer_obj << integer_reg[2]
integer_reg << integer_reg[2]
integer.reduce_int
integer_reg.reduce_int
word[integer] <= integer_reg
message[:return_value] << integer_obj
end
compiler.add_mom( Mom::ReturnSequence.new)
return compiler
end

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@ -140,6 +140,15 @@ module Risc
return ins
end
# similar to above (<< which produces slot_to_reg), this produces byte_to_reg
# since << covers all other cases, this must have a RValue as the right
def <=( right )
raise "not implemented for #{right.class}:#{right}" unless right.is_a?( RValue )
ins = Risc.byte_to_reg("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , right.index , self)
builder.add_code(ins) if builder
return ins
end
def -( right )
raise "operators only on registers, not #{right.class}" unless right.is_a? RegisterValue
op = Risc.op("#{self.type} - #{right.type}", :- , self , right )
@ -187,6 +196,15 @@ module Risc
reg_to_slot
end
# similar to above (<< which produces reg_to_slot), this produces reg_to_byte
# from itself (the slot) and the register given
def <=( reg )
raise "not reg #{reg}" unless reg.is_a?(RegisterValue)
reg_to_byte = Risc.reg_to_byte("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg , register, index)
builder.add_code(reg_to_byte) if builder
reg_to_byte
end
end
# The register we use to store the current message object is :r0

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@ -18,19 +18,19 @@ module Risc
SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, RegToByte,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
Branch, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, Branch,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Branch, Syscall, NilClass]
SlotToReg, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
RegToByte, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg,
SlotToReg, Branch, Syscall, NilClass]
assert_equal "K".ord , get_return
end
def test_reg_to_byte
done = main_ticks(40)
done = main_ticks(41)
assert_equal RegToByte , done.class
assert_equal "K".ord , @interpreter.get_register(done.register)
end

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@ -59,6 +59,13 @@ module Risc
assert_equal @r1 , ret.right
assert_equal :<< , ret.operator
end
def test_byte_to_reg
instr = @r0 <= @r1[1]
assert_equal ByteToReg , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 1 , instr.index
end
def test_slot_to_reg
instr = @r0 << @r1[:next_message]
assert_equal SlotToReg , instr.class
@ -66,6 +73,13 @@ module Risc
assert_equal @r0 , instr.register
assert_equal 3 , instr.index
end
def test_reg_to_byte
instr = @r1[1] <= @r0
assert_equal RegToByte , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 1 , instr.index
end
def test_reg_to_slot
instr = @r1[:next_message] << @r0
assert_equal RegToSlot , instr.class