4bae5c418b
fix register use in putstring
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was off by one, the syscall is write
and the first arg is file_descriptor
ie 1 == stdout
2020-03-26 11:24:56 +02:00
bc558d1f0d
do not copy name of method
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so that the resolve can compare name identity
which is what is does, not equality
this (and some other bug) is crashing arm currently
2020-03-25 12:43:57 +02:00
b2dce92883
fix arm return bug
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even had a fixme on it
2020-03-24 22:04:44 +02:00
90935bfbbc
risc is GREEN
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totally, man.
Small fix in method missing fixed last block tests
(why, i do not know)
2020-03-22 15:58:19 +02:00
37feba1239
bunch of side effects fixed
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makes one think if those are valid asserts
2020-03-22 15:56:57 +02:00
ddd1f4e296
fix interpreter syscall and rename return reg
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returned int for puts was same name as implicit return int
2020-03-22 14:31:43 +02:00
d5411c7727
Last risc fixes that are not binary, move binary tests
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move test that translate or create binary to own directory,
for semantic distance (they are the only ones still failing)
2020-03-22 14:31:43 +02:00
fea98979e8
Fix comparison bug
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Unchanged high level test, ohh how great is testing
2020-03-22 14:31:43 +02:00
6366ede8ee
check for correct operator
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was getting passed sol constants
2020-03-22 14:31:43 +02:00
0ed5e74748
Fixing ripples from previous
2020-03-22 14:31:43 +02:00
17a7f29b0c
define and use syscall_XX registers
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rather than use hardcoded r0 etc use syscall_X
change the syscalls and interpreter to use them
later use platform to map from syscall_X to actually used register (like r0 in arm)
2020-03-22 14:31:43 +02:00
3b50fee158
fix stray misc in slot
2020-03-22 14:31:43 +02:00
9f609bdb06
fix mod and tests
2020-03-22 14:31:43 +02:00
7232c28ecd
operator also fell into ssa trap
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relying on register identity
in fact the whole operator concept was geared towards this, using 2 regs instead of one to avoid the whole issue
better now
2020-03-22 14:31:43 +02:00
3145547315
init fell into the ssa tap, fixed
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reducing and assuming the same register, buuh
adds a transfer instruction that can hopefully be removed by analysis
2020-03-22 14:31:43 +02:00
5b0c1195e4
Fix interpreter and resolve method
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Interpreter was not handling ssa correctly (ie overwriting)
Resolve was assuming wrong registers (also non ssa)
return value still broken
2020-03-22 14:31:43 +02:00
4db71c1c03
fix all uses of operators now they are ssa
2020-03-22 14:31:43 +02:00
f2250bc206
fix resolve and introduce method to chop strings to max
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strings are 20 bytes. I want to implement the extension idea, just not now
2020-03-22 14:31:43 +02:00
504fc3509e
fix set_internal_word register
2020-03-22 14:31:43 +02:00
d125a1528a
Fix set_internal_byte registers
2020-03-22 14:31:43 +02:00
2656bfacb2
create a reduce_int on RegisterSlot
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that just passes through to RegisterValue by calling to_reg
2020-03-22 14:31:43 +02:00
17a1121408
fix putstring registers
2020-03-22 14:31:43 +02:00
3a3a9277b3
fix operators registers
2020-03-22 14:31:43 +02:00
8867d60c13
fix method_missing register
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logic is still wrong, even it is slightly less (at least loading the method name)
2020-03-22 14:31:43 +02:00
cf5a3c0102
fix inits registers
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surprisingly easy. shorter code and more readable tests
2020-03-22 14:31:43 +02:00
8abcaa330b
fix allocate in builder
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which accessed unknown types.
also moved assert_allocate to support
2020-03-22 14:31:43 +02:00
05ddc70fd6
fix get_internal word register names
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seems previous commits broke the return
2020-03-22 14:31:43 +02:00
a70e510548
fix test_exit registers
2020-03-22 14:31:43 +02:00
fb4fa598f2
fix get_internal_byte
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improved operators and tests
some logic errors still
2020-03-22 14:31:43 +02:00
c1cfc12a1c
converted resolve_method
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Big, left till last, but surprisingly painless
2020-03-22 14:31:43 +02:00
12fe0b9a10
add constants automatically
2020-03-22 14:31:43 +02:00
e6729b8b60
fixing instruction tests
2020-03-22 14:31:43 +02:00
22d513d895
fix div4 and tests
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also bug in reduce_int, compiler not carried through
2020-03-22 14:31:43 +02:00
eed9ba082f
Fix div10 and test
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fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
bd02f69824
reduce_int was overwriting register
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No more. But the type question is open, ie what type does the resulting register have
2020-03-22 14:31:43 +02:00
1760b5b203
fix comparison test and helpers
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moving to passing the instruction number, not the instruction
so in the error message we can say where the error is
(otherwise minitest is good enough to supress the trace of asserts calling asserts)
2020-03-22 14:31:43 +02:00
9c5d17a3bb
Fix div10 without method_missing
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but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
3688c967d3
Fix comparison macro
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which leaves a definite need for instruction level testing
2020-03-22 14:31:43 +02:00
2af953e1d2
last instruciton, dynamic_call
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next macros
2020-03-22 14:31:43 +02:00
7f5ebab800
did block yield
2020-03-22 14:31:43 +02:00
a4c0b8e5f9
did return sequence
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surprisingly easy. also some check polish
2020-03-22 14:31:43 +02:00
db5a59f735
Unify instruction namings also dirs
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Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
2020-03-22 14:31:43 +02:00
f3d299208e
fix message_setup with new builder
2020-03-22 14:31:43 +02:00
ff49ff50c0
Convert SimpleCall to new regs
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Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
4b303977a7
Fix first Slot instruction that uses builder
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now without method_missing and names
but still with instance_eval, hmm. Tried without, makes code much less readable
2020-03-22 14:31:43 +02:00
4888b3b6db
Starting to rework slot instructions that create risc
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have to go through all and all macros and all thems tests. What did the wise man say: one step at a time
2020-03-22 14:31:43 +02:00
088017bc05
SA for Slotted derivations
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Object and Constant similarity are coming more into focus. Will unite after the merge
2020-03-22 14:31:43 +02:00
393f0d9a60
fix argument transfer (to be logical)
2020-02-27 18:19:27 +02:00
685022a6e0
Externalise register allocation into own class
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On the way to the register allocation
2020-02-27 11:57:18 +02:00
8832df3221
Add number of registers to platform
2020-02-26 19:01:01 +02:00
