Commit Graph

30 Commits

Author SHA1 Message Date
d5411c7727 Last risc fixes that are not binary, move binary tests
move test that translate or create binary to own directory, 
for semantic distance (they are the only ones still failing)
2020-03-22 14:31:43 +02:00
fea98979e8 Fix comparison bug
Unchanged high level test, ohh how great is testing
2020-03-22 14:31:43 +02:00
6366ede8ee check for correct operator
was getting passed sol constants
2020-03-22 14:31:43 +02:00
0ed5e74748 Fixing ripples from previous 2020-03-22 14:31:43 +02:00
17a7f29b0c define and use syscall_XX registers
rather than use hardcoded r0 etc use syscall_X
change the syscalls and interpreter to use them
later use platform to map from syscall_X to actually used register (like r0 in arm)
2020-03-22 14:31:43 +02:00
3b50fee158 fix stray misc in slot 2020-03-22 14:31:43 +02:00
9f609bdb06 fix mod and tests 2020-03-22 14:31:43 +02:00
7232c28ecd operator also fell into ssa trap
relying on register identity
in fact the whole operator concept was geared towards this, using 2 regs instead of one to avoid the whole issue
better now
2020-03-22 14:31:43 +02:00
3145547315 init fell into the ssa tap, fixed
reducing and assuming the same register, buuh
adds a transfer instruction that can hopefully be removed by analysis
2020-03-22 14:31:43 +02:00
4db71c1c03 fix all uses of operators now they are ssa 2020-03-22 14:31:43 +02:00
f2250bc206 fix resolve and introduce method to chop strings to max
strings are 20 bytes. I want to implement the extension idea, just not now
2020-03-22 14:31:43 +02:00
504fc3509e fix set_internal_word register 2020-03-22 14:31:43 +02:00
d125a1528a Fix set_internal_byte registers 2020-03-22 14:31:43 +02:00
2656bfacb2 create a reduce_int on RegisterSlot
that just passes through to RegisterValue by calling to_reg
2020-03-22 14:31:43 +02:00
17a1121408 fix putstring registers 2020-03-22 14:31:43 +02:00
3a3a9277b3 fix operators registers 2020-03-22 14:31:43 +02:00
8867d60c13 fix method_missing register
logic is still wrong, even it is slightly less (at least loading the method name)
2020-03-22 14:31:43 +02:00
cf5a3c0102 fix inits registers
surprisingly easy. shorter code and more readable tests
2020-03-22 14:31:43 +02:00
05ddc70fd6 fix get_internal word register names
seems previous commits broke the return
2020-03-22 14:31:43 +02:00
a70e510548 fix test_exit registers 2020-03-22 14:31:43 +02:00
fb4fa598f2 fix get_internal_byte
improved operators and tests
some logic errors still
2020-03-22 14:31:43 +02:00
22d513d895 fix div4 and tests
also bug in reduce_int, compiler not carried through
2020-03-22 14:31:43 +02:00
eed9ba082f Fix div10 and test
fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
bd02f69824 reduce_int was overwriting register
No more. But the type question is open, ie what type does the resulting register have
2020-03-22 14:31:43 +02:00
1760b5b203 fix comparison test and helpers
moving to passing the instruction number, not the instruction
so in the error message we can say where the error is
(otherwise minitest is good enough to supress the trace of asserts calling asserts)
2020-03-22 14:31:43 +02:00
9c5d17a3bb Fix div10 without method_missing
but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
3688c967d3 Fix comparison macro
which leaves a definite need for instruction level testing
2020-03-22 14:31:43 +02:00
d1f8733623 Rename Vool to Sol
Simple is really the descriptive name for the layer
Sure, it is "virtual" but that is not as important as the fact that it is simple (or simplified)
Also objct (based really) is better, since orientated implies it is a little like that, but only orientated, not really it. Sol only has objects, nothing else
Just cause i was renaming anyway
2019-10-04 00:38:47 +03:00
aa9fc8bc81 More rename cleanp 2019-10-03 21:07:55 +03:00
c43436f35a Change Mom to SlotMachine
rather large commit, but essentially a simple rename
Rationale in docs and blogs
2019-10-03 20:55:41 +03:00