17a7f29b0c
define and use syscall_XX registers
...
rather than use hardcoded r0 etc use syscall_X
change the syscalls and interpreter to use them
later use platform to map from syscall_X to actually used register (like r0 in arm)
2020-03-22 14:31:43 +02:00
61fc8a3991
make operator_instruction single ass
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create result register automatically
usually not used, but register allocation will sort that
2020-03-22 14:31:43 +02:00
6267bf3ad0
fix slot_to_reg to allow register indexes
...
we mostly use pre-calculated indexes, ie integers
but registers are allowed (in arm/risc), so we try to check the registers type at least is right.
The return is really a machine word, but we call it Object (yes, more work that way)
2020-03-22 14:31:43 +02:00
eed9ba082f
Fix div10 and test
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fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
53eb28fff4
load constant to create register names with class
...
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
2020-03-22 14:31:43 +02:00
9c5d17a3bb
Fix div10 without method_missing
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but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
db5a59f735
Unify instruction namings also dirs
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Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
2020-03-22 14:31:43 +02:00
ff49ff50c0
Convert SimpleCall to new regs
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Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
4888b3b6db
Starting to rework slot instructions that create risc
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have to go through all and all macros and all thems tests. What did the wise man say: one step at a time
2020-03-22 14:31:43 +02:00
4643be0ae6
codong RegisterSlot with reg and slot
2020-03-22 14:31:43 +02:00
d22da1ab97
SA for slot_to_reg
2020-03-22 14:31:43 +02:00
77003eed06
remove use_reg on compiler and SA for load
2020-03-22 14:31:43 +02:00
3c762c4fe7
Rename SlotDefinition to Slot
...
And the derived XXDefinitions to XXSlot
Just to be more consistent
And possibly free the Definition for the Language side
2020-02-11 16:19:52 +07:00
d1f8733623
Rename Vool to Sol
...
Simple is really the descriptive name for the layer
Sure, it is "virtual" but that is not as important as the fact that it is simple (or simplified)
Also objct (based really) is better, since orientated implies it is a little like that, but only orientated, not really it. Sol only has objects, nothing else
Just cause i was renaming anyway
2019-10-04 00:38:47 +03:00
c43436f35a
Change Mom to SlotMachine
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rather large commit, but essentially a simple rename
Rationale in docs and blogs
2019-10-03 20:55:41 +03:00
b46512a1b8
tests for mom check instructions
2019-09-15 19:57:15 +03:00
b36ba42990
Test complied parfait tests
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this makes it obvious that we need a working raise
and a correct method_missing, so we can diagnose the
resulting errors
2019-09-15 12:18:31 +03:00
5ea91df4c1
Integer macros tests and defs
2019-09-11 19:23:56 +03:00
63323376e4
use more instances in parfait
...
and misc
2019-09-10 12:33:57 +03:00
Torsten Ruger
bbb7dbef75
First part of int allocation
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implemented allocate_int
instead of add_new_int
2018-11-21 11:12:39 +02:00
Torsten Ruger
c983dcf0eb
move return address generation to factory
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removes the list from space
adds a ReturnAddress factory instead
and uses these throughout
2018-08-29 21:02:49 +03:00
Torsten Ruger
f85fe8a2cb
fix bug in slot_load and definition
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move parfait helper for reuse
2018-08-19 15:36:51 +03:00
Torsten Ruger
f5c284b3a0
bring the blocks down to mom level
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reusing message_setup, but adding yield specific instructions
2018-07-24 11:35:49 +03:00
Torsten Ruger
280ea8a8c4
remove resolve_to_register
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which was, quite simply, from another era when more than message was pinned
2018-07-16 19:19:49 +03:00
Torsten Ruger
4cc04787e9
remove Risc.resolve_to_index
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mostly by using better typed registers,
which cleans up the code where it was used
2018-07-16 19:00:04 +03:00
Torsten Ruger
3bc85805a4
must pass registers to slot_to_reg and reg_to_slot
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as they are typed, those functions don't resolve on Risc, but the register type
miscother changes from previous commits
2018-07-15 16:30:50 +03:00
Torsten Ruger
e099014d63
fix dunamic jump in interpreter and misc
2018-07-03 19:15:36 +03:00
Torsten Ruger
c947c27a14
clean up booting
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many machine boot became obsolete
or just neede parfait to boot
actual linker functionality pending
2018-07-01 14:12:42 +03:00
Torsten Ruger
d50893bb0f
rename risc_value to register_value
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almost to register, but it still carries that value
2018-06-29 11:39:07 +03:00
Torsten Ruger
046617f8dc
add branch listener functionaliy
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have to store the branches and loop again as labels
dont neccessarily have positions yet
2018-06-17 22:25:38 +03:00
Torsten Ruger
3cc9175efa
start BranchListener
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but on hold, since it needs positions before we have them
Must create them during collection phase
2018-06-14 21:29:34 +03:00
Torsten Ruger
67100a3ef8
write adjusted address
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and rename integer to address in label
1k hurray
2018-05-31 00:07:58 +03:00
Torsten Ruger
e39e96f646
create return address as own class to hold return addresses
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to distinguish from integer, which does not need adjusting
2018-05-30 23:49:01 +03:00
Torsten Ruger
0dc89c772a
get the label int to work consistently
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still need to use it in the return
2018-05-30 10:54:18 +03:00
Torsten Ruger
074ec34659
wip, fixed some label, need more fixing
2018-05-30 10:29:38 +03:00
Torsten Ruger
8322fca7b3
give labels an integer that will end up being the position at runtime
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Since integers are first class objects, we need to use an integer object
as the return address. The actual address can not be stored in an
instance variable since it is not an object.
The address is unique to the label and never changes after positioning
(using the int is next up)
2018-05-29 20:26:00 +03:00
Torsten Ruger
6f0fad0957
dragging the extra through resets
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as the binary the instruction is in may change when repositioning
2018-05-25 19:04:48 +03:00
Torsten Ruger
183d4152d5
loading label must translate the labels too
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(psst: like arm translator already did. duh)
2018-05-24 19:20:06 +03:00
Torsten Ruger
a350325b6b
fix function call and simple call logic
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Before creating DynamicJump, the FunctionCall got a register for a
possible jump address. Now that is handled by DynamicJump and
FunctionCall just needs the method, from which it determines the
binaryCode address
2018-05-19 12:21:20 +03:00
Torsten Ruger
e237bc625a
remove unused methods
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and a whole lot more index fixes
2018-05-14 20:50:52 +03:00
Torsten Ruger
3c00239f36
another million index fixes
2018-05-14 15:17:04 +03:00
Torsten Ruger
4a88f342d3
random checkin
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still suffering -1 trauma
2018-05-14 12:38:44 +03:00
Torsten Ruger
ce3cc72f9e
move all position setting into position
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Position and subclasses handle the logic, external to
the classes, so it can be swapped out later
(at runtime positions can’t change)
2018-05-07 22:30:43 +03:00
Torsten Ruger
68fb9b1bdc
rename Position get/set
2018-05-06 20:04:02 +03:00
Torsten Ruger
e89c4d1ce1
pass binary that arm instruction belongs to in
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at least to first. repositioning and stuff next
2018-05-06 19:56:36 +03:00
Torsten Ruger
d65a982454
start by moving positioned(module) to position(class)
2018-05-05 19:47:18 +03:00
Torsten Ruger
43d5521cfc
debugging positions
2018-05-05 19:32:01 +03:00
Torsten Ruger
9e21719aeb
generalise the operator handling
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ie passing them through
implementing more
2018-04-19 22:13:52 +03:00
Torsten Ruger
f09086e524
unite the two resolve_to_index functions
2018-04-05 20:10:00 +03:00
Torsten Ruger
5bb3ad03cc
some more safety tests
2018-04-05 12:22:40 +03:00
