another million index fixes
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4a88f342d3
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3c00239f36
@ -21,7 +21,7 @@ module Arm
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# if an instruction is passed in we get the index with index function
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def arm_index( index )
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index = index.index if index.is_a?(Risc::Instruction)
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raise "index error 0" if index == 0
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raise "index error #{index}" if index < 0
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index * 4
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end
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@ -92,7 +92,7 @@ module Parfait
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end
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def add_local( name , type )
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index = has_local name
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index = has_local( name )
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return index if index
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@frame_type = @frame_type.add_instance_variable(name,type)
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end
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@ -13,7 +13,7 @@ module Risc
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# Go through and assemble all instructions.
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def assemble( instruction )
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@index = 1
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@index = 0
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while(instruction)
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instruction.assemble(self)
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instruction = instruction.next
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@ -59,8 +59,8 @@ module Risc
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space = Parfait::Space.new( classes )
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Parfait.set_object_space( space )
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#puts Sof.write(space)
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#boot_functions( space )
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#puts Rfx.write(space)
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boot_functions( space )
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end
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# types is where the snake bites its tail. Every chain ends at a type and then it
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@ -103,7 +103,7 @@ module Risc
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# return both registers
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def self_and_int_arg( source )
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me = add_known( :receiver )
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int_arg = load_int_arg_at(source , 1 )
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int_arg = load_int_arg_at(source , 0 )
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return me , int_arg
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end
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@ -114,7 +114,7 @@ module Risc
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add_slot_to_reg(source , int_arg , at + 1, int_arg ) #1 for type
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return int_arg
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end
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# assumed Integer in given register is replaced by the fixnum that it is holding
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def reduce_int( source , register )
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add_slot_to_reg( source + "int -> fix" , register , Parfait::Integer.integer_index , register)
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@ -27,8 +27,7 @@ module Risc
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source = "set_internal_word"
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builder = compiler.builder(true, compiler.method)
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me , index = builder.self_and_int_arg(source)
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value = builder.load_int_arg_at(source , 2)
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value = builder.load_int_arg_at(source , 1)
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# do the set
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builder.add_reg_to_slot( source , value , me , index)
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compiler.add_mom( Mom::ReturnSequence.new)
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@ -41,7 +41,7 @@ module Risc
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source = "set_internal_byte"
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builder = compiler.builder(true, compiler.method)
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me , index = builder.self_and_int_arg(source)
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value = builder.load_int_arg_at(source , 2 )
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value = builder.load_int_arg_at(source , 1 )
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builder.reduce_int( source + " fix me", value )
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builder.reduce_int( source + " fix arg", index )
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builder.add_reg_to_byte( source , value , me , index)
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@ -18,9 +18,14 @@ module Risc
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# (which are precisely the symbols :message or :new_message. or a register)
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# index resolves with resolve_to_index.
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def self.reg_to_slot( source , from_reg , to , index )
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no_rec = index != :receiver
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puts "FROM #{from_reg}"
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puts "TO #{to}"
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puts "IN #{index}"
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from = resolve_to_register from_reg
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index = resolve_to_index( to , index)
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to = resolve_to_register to
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# raise "HALLO " if index == 2 and no_rec
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RegToSlot.new( source, from , to , index)
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end
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@ -21,7 +21,7 @@ module Risc
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@register = register
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@array = array
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@index = index
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raise "index 0 " if index < 0
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# raise "index 0 " if index < 0
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raise "Not integer or reg #{index}" unless index.is_a?(Numeric) or RiscValue.look_like_reg(index)
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raise "Not register #{register}" unless RiscValue.look_like_reg(register)
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raise "Not register #{array}" unless RiscValue.look_like_reg(array)
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@ -153,6 +153,7 @@ module Risc
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else
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index = get_register(@instruction.index)
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end
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puts "INDEX #{index} #{value}"
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object.set_internal_word( index , value )
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trigger(:object_changed, @instruction.array , index)
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true
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@ -144,6 +144,7 @@ module Risc
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end
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def write_data4( code )
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write_ref_for( code.get_type )
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write_ref_for( code.get_type )
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log.debug "Data4 witten stream 0x#{@stream.length.to_s(16)}"
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end
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@ -161,6 +162,7 @@ module Risc
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code.each_word do |word|
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@stream.write_unsigned_int_32( word || 0 )
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end
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write_ref_for( code.get_type )
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log.debug "Code16 witten stream 0x#{@stream.length.to_s(16)}"
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end
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@ -24,8 +24,8 @@ module Risc
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end
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def test_load_args_from_message
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produced = produce_body
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
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assert_equal 8 , produced.next.index , produced.next.to_rxf
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf[0..200]
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assert_equal 8 , produced.next.index , produced.next.to_rxf[0..200]
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end
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end
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@ -25,8 +25,8 @@ module Risc
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def test_load_self_from_message
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produced = produce_body
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
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assert_equal 3 , produced.next.index , produced.next.to_rxf
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf[0..200]
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assert_equal 2 , produced.next.index , produced.next.to_rxf[0..200]
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end
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end
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@ -19,13 +19,13 @@ module Risc
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end
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def test_load_args_from_message
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produced = produce_body
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assert_equal :r0 , produced.array.symbol , produced.next.to_rxf
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assert_equal 9 , produced.index , produced.next.to_rxf
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assert_equal :r0 , produced.array.symbol , produced.next.to_rxf[0..200]
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assert_equal 8 , produced.index , produced.next.to_rxf[0..200]
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end
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def test_load_frame_from_message
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produced = produce_body
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assert_equal :r0 , produced.next(2).array.symbol , produced.next.to_rxf
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assert_equal 2 , produced.next.index , produced.next.to_rxf
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assert_equal :r0 , produced.next(2).array.symbol , produced.next.to_rxf[0..200]
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assert_equal 1 , produced.next.index , produced.next.to_rxf[0..200]
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end
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end
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end
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@ -36,14 +36,14 @@ module Risc
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assert_equal SlotToReg , produced.next(base+1).class
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assert_equal :r2 , produced.next(base+1).register.symbol
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assert_equal :r0 , produced.next(base+1).array.symbol
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assert_equal 2 , produced.next(base+1).index
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assert_equal 1 , produced.next(base+1).index
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end
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def test_load_args
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produced = produce_body
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assert_equal SlotToReg , produced.next(base+2).class
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assert_equal :r3 , produced.next(base+2).register.symbol
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assert_equal :r2 , produced.next(base+2).array.symbol
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assert_equal 9 , produced.next(base+2).index
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assert_equal 8 , produced.next(base+2).index
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end
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def test_store_arg_at
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produced = produce_body
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@ -62,14 +62,14 @@ module Risc
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assert_equal SlotToReg , produced.next(base+5).class
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assert_equal :r0 , produced.next(base+5).array.symbol
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assert_equal :r3 , produced.next(base+5).register.symbol
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assert_equal 2 , produced.next(base+5).index
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assert_equal 1 , produced.next(base+5).index
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end
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def test_store_
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produced = produce_body
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assert_equal RegToSlot , produced.next(base+6).class
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assert_equal :r3 , produced.next(base+6).array.symbol
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assert_equal :r2 , produced.next(base+6).register.symbol
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assert_equal 5 , produced.next(base+6).index
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assert_equal 4 , produced.next(base+6).index
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end
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def test_swap_messages
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@ -77,7 +77,7 @@ module Risc
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assert_equal SlotToReg , produced.next(base+7).class
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assert_equal :r0 , produced.next(base+7).array.symbol
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assert_equal :r0 , produced.next(base+7).register.symbol
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assert_equal 2 , produced.next(base+7).index
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assert_equal 1 , produced.next(base+7).index
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end
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def test_function_call
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@ -30,59 +30,59 @@ module Risc
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end
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def test_load_first_message #from space (ie r2)
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sl = @produced.next( 2 )
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assert_slot_to_reg( sl , :r2 , 4 , :r3 )
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assert_slot_to_reg( sl , :r2 , 3 , :r3 )
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end
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def test_store_message_in_current
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sl = @produced.next( 3 )
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assert_reg_to_slot( sl , :r3 , :r0 , 2 )
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assert_reg_to_slot( sl , :r3 , :r0 , 1 )
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end
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def test_store_caller_in_message
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sl = @produced.next( 4 )
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assert_reg_to_slot( sl , :r0 , :r3 , 7 )
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assert_reg_to_slot( sl , :r0 , :r3 , 6 )
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end
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def test_get_args_type #from method in r1
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sl = @produced.next( 5 )
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assert_slot_to_reg( sl , :r1 , 7 , :r4 )
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assert_slot_to_reg( sl , :r1 , 6 , :r4 )
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end
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def test_get_args #from message
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sl = @produced.next( 6 )
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assert_slot_to_reg( sl , :r3 , 9 , :r5 )
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assert_slot_to_reg( sl , :r3 , 8 , :r5 )
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end
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def test_store_type_in_args
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sl = @produced.next( 7 )
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assert_reg_to_slot( sl , :r4 , :r5 , 1 )
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assert_reg_to_slot( sl , :r4 , :r5 , 0 )
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end
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def test_get_frame_type #from method in r1
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sl = @produced.next( 8 )
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assert_slot_to_reg( sl , :r1 , 9 , :r4 )
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assert_slot_to_reg( sl , :r1 , 8 , :r4 )
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end
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def test_get_frame #from message
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sl = @produced.next( 9 )
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assert_slot_to_reg( sl , :r3 , 4 , :r5 )
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assert_slot_to_reg( sl , :r3 , 3 , :r5 )
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end
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def test_store_type_in_frame
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sl = @produced.next( 10 )
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assert_reg_to_slot( sl , :r4 , :r5 , 1 )
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assert_reg_to_slot( sl , :r4 , :r5 , 0 )
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end
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def test_get_name
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sl = @produced.next( 11 )
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assert_slot_to_reg( sl , :r1 , 2 , :r6 )
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assert_slot_to_reg( sl , :r1 , 1 , :r6 )
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end
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def test_store_name_in_message
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sl = @produced.next( 12 )
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assert_reg_to_slot( sl , :r6 , :r3 , 8 )
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assert_reg_to_slot( sl , :r6 , :r3 , 7 )
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end
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def test_get_next_next #reduce onto itself
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sl = @produced.next( 13 )
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assert_slot_to_reg( sl , :r3 , 2 , :r3 )
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assert_slot_to_reg( sl , :r3 , 1 , :r3 )
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end
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def test_store_next_next_in_space
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sl = @produced.next( 14 )
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assert_reg_to_slot( sl , :r3 , :r2 , 4 )
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assert_reg_to_slot( sl , :r3 , :r2 , 3 )
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end
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end
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end
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@ -1,28 +1,28 @@
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require_relative "helper"
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module Risc
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class TestReturnDynamic #< MiniTest::Test
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class TestReturnDynamic < MiniTest::Test
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include Statements
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def setup
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super
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@input = "return @a.div4"
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@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
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IsZero, SlotToReg, SlotToReg, LoadConstant, RegToSlot,
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LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
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SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
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LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, SlotToReg, LoadConstant, FunctionCall, Label,
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SlotToReg, LoadConstant, RegToSlot, Label, LoadConstant,
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LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
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SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
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@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
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OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
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LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
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SlotToReg, Label, LoadConstant, SlotToReg, OperatorInstruction,
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IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
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Branch, Label, Transfer, Syscall, Transfer,
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Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
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RegToSlot, RegToSlot, Label, RegToSlot, Label,
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LoadConstant, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
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RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, RegToSlot, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
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DynamicJump, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
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SlotToReg, SlotToReg, FunctionReturn]
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, RegToSlot,
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LoadConstant, SlotToReg, RegToSlot, SlotToReg, LoadConstant,
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SlotToReg, DynamicJump, Label, SlotToReg, SlotToReg,
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RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, RegToSlot, SlotToReg, SlotToReg, FunctionReturn]
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end
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def test_return_instructions
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@ -30,11 +30,11 @@ module Risc
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end
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def test_function_return
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produced = produce_body
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assert_equal FunctionReturn , produced.next(77).class
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assert_equal FunctionReturn , produced.next(79).class
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end
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def test_cache_check
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produced = produce_body
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assert_equal IsZero , produced.next(5).class
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assert_equal IsZero , produced.next(6).class
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end
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end
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end
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@ -33,8 +33,8 @@ module Parfait
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def test_add_arg
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@method.add_argument(:foo2 , :Object)
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assert_equal 3 , @method.arguments_length
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assert_equal :foo2 , @method.argument_name(3)
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assert_equal :Object , @method.argument_type(3)
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assert_equal :foo2 , @method.argument_name(2)
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assert_equal :Object , @method.argument_type(2)
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end
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def test_get_arg_name1
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@ -70,8 +70,8 @@ module Parfait
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def test_add_local
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@method.add_local(:foo2 , :Object)
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assert_equal 3 , @method.frame_length
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assert_equal :foo2 , @method.locals_name(3)
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assert_equal :Object , @method.locals_type(3)
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assert_equal :foo2 , @method.locals_name(2)
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assert_equal :Object , @method.locals_type(2)
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end
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def test_get_locals_name1
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@ -21,7 +21,7 @@ module Risc
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def length
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88
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end
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def test_state_change
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def est_state_change
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@interpreter.register_event :state_changed , self
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ticks length
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assert @state_events[:state_changed]
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@ -30,7 +30,7 @@ module Risc
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@interpreter.unregister_event :state_changed , self
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end
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def test_instruction_events
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def est_instruction_events
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@interpreter.register_event :instruction_changed , self
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ticks length
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assert_equal length , @instruction_events.length
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@ -39,10 +39,10 @@ module Risc
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assert_equal 0 , Position.get(@machine.cpu_init).at
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end
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def test_cpu_at
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assert_equal "0x5ad8" , Position.get(@machine.cpu_init.first).to_s
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assert_equal "0x5bd8" , Position.get(@machine.cpu_init.first).to_s
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end
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def test_cpu_bin
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assert_equal "0x5acc" , Position.get(Position.get(@machine.cpu_init.first).binary).to_s
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assert_equal "0x5bcc" , Position.get(Position.get(@machine.cpu_init.first).binary).to_s
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end
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def test_cpu_label
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assert_equal Position::InstructionPosition , Position.get(@machine.cpu_init.first).class
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@ -46,14 +46,14 @@ module Risc
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assert_equal SlotToReg , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 4 , instr.index
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assert_equal 3 , instr.index
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end
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def test_reg_to_slot
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instr = @r1[:first_message] << @r0
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assert_equal RegToSlot , instr.class
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assert_equal @r1 , instr.array
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assert_equal @r0 , instr.register
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assert_equal 4 , instr.index
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assert_equal 3 , instr.index
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end
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end
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end
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