another million index fixes

This commit is contained in:
Torsten Ruger 2018-05-14 15:17:04 +03:00
parent 4a88f342d3
commit 3c00239f36
21 changed files with 72 additions and 65 deletions

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@ -21,7 +21,7 @@ module Arm
# if an instruction is passed in we get the index with index function
def arm_index( index )
index = index.index if index.is_a?(Risc::Instruction)
raise "index error 0" if index == 0
raise "index error #{index}" if index < 0
index * 4
end

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@ -92,7 +92,7 @@ module Parfait
end
def add_local( name , type )
index = has_local name
index = has_local( name )
return index if index
@frame_type = @frame_type.add_instance_variable(name,type)
end

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@ -13,7 +13,7 @@ module Risc
# Go through and assemble all instructions.
def assemble( instruction )
@index = 1
@index = 0
while(instruction)
instruction.assemble(self)
instruction = instruction.next

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@ -59,8 +59,8 @@ module Risc
space = Parfait::Space.new( classes )
Parfait.set_object_space( space )
#puts Sof.write(space)
#boot_functions( space )
#puts Rfx.write(space)
boot_functions( space )
end
# types is where the snake bites its tail. Every chain ends at a type and then it

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@ -103,7 +103,7 @@ module Risc
# return both registers
def self_and_int_arg( source )
me = add_known( :receiver )
int_arg = load_int_arg_at(source , 1 )
int_arg = load_int_arg_at(source , 0 )
return me , int_arg
end
@ -114,7 +114,7 @@ module Risc
add_slot_to_reg(source , int_arg , at + 1, int_arg ) #1 for type
return int_arg
end
# assumed Integer in given register is replaced by the fixnum that it is holding
def reduce_int( source , register )
add_slot_to_reg( source + "int -> fix" , register , Parfait::Integer.integer_index , register)

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@ -27,8 +27,7 @@ module Risc
source = "set_internal_word"
builder = compiler.builder(true, compiler.method)
me , index = builder.self_and_int_arg(source)
value = builder.load_int_arg_at(source , 2)
value = builder.load_int_arg_at(source , 1)
# do the set
builder.add_reg_to_slot( source , value , me , index)
compiler.add_mom( Mom::ReturnSequence.new)

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@ -41,7 +41,7 @@ module Risc
source = "set_internal_byte"
builder = compiler.builder(true, compiler.method)
me , index = builder.self_and_int_arg(source)
value = builder.load_int_arg_at(source , 2 )
value = builder.load_int_arg_at(source , 1 )
builder.reduce_int( source + " fix me", value )
builder.reduce_int( source + " fix arg", index )
builder.add_reg_to_byte( source , value , me , index)

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@ -18,9 +18,14 @@ module Risc
# (which are precisely the symbols :message or :new_message. or a register)
# index resolves with resolve_to_index.
def self.reg_to_slot( source , from_reg , to , index )
no_rec = index != :receiver
puts "FROM #{from_reg}"
puts "TO #{to}"
puts "IN #{index}"
from = resolve_to_register from_reg
index = resolve_to_index( to , index)
to = resolve_to_register to
# raise "HALLO " if index == 2 and no_rec
RegToSlot.new( source, from , to , index)
end

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@ -21,7 +21,7 @@ module Risc
@register = register
@array = array
@index = index
raise "index 0 " if index < 0
# raise "index 0 " if index < 0
raise "Not integer or reg #{index}" unless index.is_a?(Numeric) or RiscValue.look_like_reg(index)
raise "Not register #{register}" unless RiscValue.look_like_reg(register)
raise "Not register #{array}" unless RiscValue.look_like_reg(array)

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@ -153,6 +153,7 @@ module Risc
else
index = get_register(@instruction.index)
end
puts "INDEX #{index} #{value}"
object.set_internal_word( index , value )
trigger(:object_changed, @instruction.array , index)
true

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@ -144,6 +144,7 @@ module Risc
end
def write_data4( code )
write_ref_for( code.get_type )
write_ref_for( code.get_type )
log.debug "Data4 witten stream 0x#{@stream.length.to_s(16)}"
end
@ -161,6 +162,7 @@ module Risc
code.each_word do |word|
@stream.write_unsigned_int_32( word || 0 )
end
write_ref_for( code.get_type )
log.debug "Code16 witten stream 0x#{@stream.length.to_s(16)}"
end

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@ -24,8 +24,8 @@ module Risc
end
def test_load_args_from_message
produced = produce_body
assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
assert_equal 8 , produced.next.index , produced.next.to_rxf
assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf[0..200]
assert_equal 8 , produced.next.index , produced.next.to_rxf[0..200]
end
end

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@ -25,8 +25,8 @@ module Risc
def test_load_self_from_message
produced = produce_body
assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
assert_equal 3 , produced.next.index , produced.next.to_rxf
assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf[0..200]
assert_equal 2 , produced.next.index , produced.next.to_rxf[0..200]
end
end

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@ -19,13 +19,13 @@ module Risc
end
def test_load_args_from_message
produced = produce_body
assert_equal :r0 , produced.array.symbol , produced.next.to_rxf
assert_equal 9 , produced.index , produced.next.to_rxf
assert_equal :r0 , produced.array.symbol , produced.next.to_rxf[0..200]
assert_equal 8 , produced.index , produced.next.to_rxf[0..200]
end
def test_load_frame_from_message
produced = produce_body
assert_equal :r0 , produced.next(2).array.symbol , produced.next.to_rxf
assert_equal 2 , produced.next.index , produced.next.to_rxf
assert_equal :r0 , produced.next(2).array.symbol , produced.next.to_rxf[0..200]
assert_equal 1 , produced.next.index , produced.next.to_rxf[0..200]
end
end
end

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@ -36,14 +36,14 @@ module Risc
assert_equal SlotToReg , produced.next(base+1).class
assert_equal :r2 , produced.next(base+1).register.symbol
assert_equal :r0 , produced.next(base+1).array.symbol
assert_equal 2 , produced.next(base+1).index
assert_equal 1 , produced.next(base+1).index
end
def test_load_args
produced = produce_body
assert_equal SlotToReg , produced.next(base+2).class
assert_equal :r3 , produced.next(base+2).register.symbol
assert_equal :r2 , produced.next(base+2).array.symbol
assert_equal 9 , produced.next(base+2).index
assert_equal 8 , produced.next(base+2).index
end
def test_store_arg_at
produced = produce_body
@ -62,14 +62,14 @@ module Risc
assert_equal SlotToReg , produced.next(base+5).class
assert_equal :r0 , produced.next(base+5).array.symbol
assert_equal :r3 , produced.next(base+5).register.symbol
assert_equal 2 , produced.next(base+5).index
assert_equal 1 , produced.next(base+5).index
end
def test_store_
produced = produce_body
assert_equal RegToSlot , produced.next(base+6).class
assert_equal :r3 , produced.next(base+6).array.symbol
assert_equal :r2 , produced.next(base+6).register.symbol
assert_equal 5 , produced.next(base+6).index
assert_equal 4 , produced.next(base+6).index
end
def test_swap_messages
@ -77,7 +77,7 @@ module Risc
assert_equal SlotToReg , produced.next(base+7).class
assert_equal :r0 , produced.next(base+7).array.symbol
assert_equal :r0 , produced.next(base+7).register.symbol
assert_equal 2 , produced.next(base+7).index
assert_equal 1 , produced.next(base+7).index
end
def test_function_call

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@ -30,59 +30,59 @@ module Risc
end
def test_load_first_message #from space (ie r2)
sl = @produced.next( 2 )
assert_slot_to_reg( sl , :r2 , 4 , :r3 )
assert_slot_to_reg( sl , :r2 , 3 , :r3 )
end
def test_store_message_in_current
sl = @produced.next( 3 )
assert_reg_to_slot( sl , :r3 , :r0 , 2 )
assert_reg_to_slot( sl , :r3 , :r0 , 1 )
end
def test_store_caller_in_message
sl = @produced.next( 4 )
assert_reg_to_slot( sl , :r0 , :r3 , 7 )
assert_reg_to_slot( sl , :r0 , :r3 , 6 )
end
def test_get_args_type #from method in r1
sl = @produced.next( 5 )
assert_slot_to_reg( sl , :r1 , 7 , :r4 )
assert_slot_to_reg( sl , :r1 , 6 , :r4 )
end
def test_get_args #from message
sl = @produced.next( 6 )
assert_slot_to_reg( sl , :r3 , 9 , :r5 )
assert_slot_to_reg( sl , :r3 , 8 , :r5 )
end
def test_store_type_in_args
sl = @produced.next( 7 )
assert_reg_to_slot( sl , :r4 , :r5 , 1 )
assert_reg_to_slot( sl , :r4 , :r5 , 0 )
end
def test_get_frame_type #from method in r1
sl = @produced.next( 8 )
assert_slot_to_reg( sl , :r1 , 9 , :r4 )
assert_slot_to_reg( sl , :r1 , 8 , :r4 )
end
def test_get_frame #from message
sl = @produced.next( 9 )
assert_slot_to_reg( sl , :r3 , 4 , :r5 )
assert_slot_to_reg( sl , :r3 , 3 , :r5 )
end
def test_store_type_in_frame
sl = @produced.next( 10 )
assert_reg_to_slot( sl , :r4 , :r5 , 1 )
assert_reg_to_slot( sl , :r4 , :r5 , 0 )
end
def test_get_name
sl = @produced.next( 11 )
assert_slot_to_reg( sl , :r1 , 2 , :r6 )
assert_slot_to_reg( sl , :r1 , 1 , :r6 )
end
def test_store_name_in_message
sl = @produced.next( 12 )
assert_reg_to_slot( sl , :r6 , :r3 , 8 )
assert_reg_to_slot( sl , :r6 , :r3 , 7 )
end
def test_get_next_next #reduce onto itself
sl = @produced.next( 13 )
assert_slot_to_reg( sl , :r3 , 2 , :r3 )
assert_slot_to_reg( sl , :r3 , 1 , :r3 )
end
def test_store_next_next_in_space
sl = @produced.next( 14 )
assert_reg_to_slot( sl , :r3 , :r2 , 4 )
assert_reg_to_slot( sl , :r3 , :r2 , 3 )
end
end
end

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@ -1,28 +1,28 @@
require_relative "helper"
module Risc
class TestReturnDynamic #< MiniTest::Test
class TestReturnDynamic < MiniTest::Test
include Statements
def setup
super
@input = "return @a.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, SlotToReg, LoadConstant, RegToSlot,
LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, FunctionCall, Label,
SlotToReg, LoadConstant, RegToSlot, Label, LoadConstant,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
SlotToReg, Label, LoadConstant, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
Branch, Label, Transfer, Syscall, Transfer,
Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, Label, RegToSlot, Label,
LoadConstant, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
DynamicJump, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, FunctionReturn]
RegToSlot, SlotToReg, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, LoadConstant,
SlotToReg, DynamicJump, Label, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, FunctionReturn]
end
def test_return_instructions
@ -30,11 +30,11 @@ module Risc
end
def test_function_return
produced = produce_body
assert_equal FunctionReturn , produced.next(77).class
assert_equal FunctionReturn , produced.next(79).class
end
def test_cache_check
produced = produce_body
assert_equal IsZero , produced.next(5).class
assert_equal IsZero , produced.next(6).class
end
end
end

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@ -33,8 +33,8 @@ module Parfait
def test_add_arg
@method.add_argument(:foo2 , :Object)
assert_equal 3 , @method.arguments_length
assert_equal :foo2 , @method.argument_name(3)
assert_equal :Object , @method.argument_type(3)
assert_equal :foo2 , @method.argument_name(2)
assert_equal :Object , @method.argument_type(2)
end
def test_get_arg_name1
@ -70,8 +70,8 @@ module Parfait
def test_add_local
@method.add_local(:foo2 , :Object)
assert_equal 3 , @method.frame_length
assert_equal :foo2 , @method.locals_name(3)
assert_equal :Object , @method.locals_type(3)
assert_equal :foo2 , @method.locals_name(2)
assert_equal :Object , @method.locals_type(2)
end
def test_get_locals_name1

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@ -21,7 +21,7 @@ module Risc
def length
88
end
def test_state_change
def est_state_change
@interpreter.register_event :state_changed , self
ticks length
assert @state_events[:state_changed]
@ -30,7 +30,7 @@ module Risc
@interpreter.unregister_event :state_changed , self
end
def test_instruction_events
def est_instruction_events
@interpreter.register_event :instruction_changed , self
ticks length
assert_equal length , @instruction_events.length

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@ -39,10 +39,10 @@ module Risc
assert_equal 0 , Position.get(@machine.cpu_init).at
end
def test_cpu_at
assert_equal "0x5ad8" , Position.get(@machine.cpu_init.first).to_s
assert_equal "0x5bd8" , Position.get(@machine.cpu_init.first).to_s
end
def test_cpu_bin
assert_equal "0x5acc" , Position.get(Position.get(@machine.cpu_init.first).binary).to_s
assert_equal "0x5bcc" , Position.get(Position.get(@machine.cpu_init.first).binary).to_s
end
def test_cpu_label
assert_equal Position::InstructionPosition , Position.get(@machine.cpu_init.first).class

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@ -46,14 +46,14 @@ module Risc
assert_equal SlotToReg , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 4 , instr.index
assert_equal 3 , instr.index
end
def test_reg_to_slot
instr = @r1[:first_message] << @r0
assert_equal RegToSlot , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 4 , instr.index
assert_equal 3 , instr.index
end
end
end