Torsten Ruger e89c4d1ce1 pass binary that arm instruction belongs to in ...

at least to first. repositioning and stuff next

2018-05-06 19:56:36 +03:00

..

branch.rb

removing unconditional

2018-04-02 19:30:34 +03:00

byte_to_reg.rb

rename register to risc

2017-01-19 09:02:29 +02:00

function_call.rb

add an integer plus

2018-03-30 17:09:02 +03:00

function_return.rb

some more safety tests

2018-04-05 12:22:40 +03:00

getter.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

label.rb

pass binary that arm instruction belongs to in

2018-05-06 19:56:36 +03:00

load_constant.rb

some more safety tests

2018-04-05 12:22:40 +03:00

load_data.rb

some more safety tests

2018-04-05 12:22:40 +03:00

operator_instruction.rb

generalise the operator handling

2018-04-19 22:13:52 +03:00

reg_to_byte.rb

rename register to risc

2017-01-19 09:02:29 +02:00

reg_to_slot.rb

rename RiscTransfer to Transfer

2018-03-21 15:48:04 +05:30

setter.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

slot_to_reg.rb

unite the two resolve_to_index functions

2018-04-05 20:10:00 +03:00

syscall.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

transfer.rb

add source to the to_s

2018-03-22 18:38:19 +02:00