Torsten Ruger
c51fc67ba5
make interpreter tests less brittle
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by factoring __init code away
just counting main
2018-04-04 20:05:09 +03:00
Torsten Ruger
65d57c8c7c
removing unconditional
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just Branch is fine
2018-04-02 19:30:34 +03:00
Torsten Ruger
a2173645b3
remove the :int shorthand
2018-03-31 19:17:55 +03:00
Torsten Ruger
cb9f6973d9
fix true false and nil constant
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going from mom to parfait
basics in place, more ripples to fix
2018-03-31 13:47:02 +03:00
Torsten Ruger
9e9b5c7f37
move to parfait integers in risc layer
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loading constants means loading parfait objects
objects have to me collected in machine
integer ok, string/true/false/nil next
2018-03-31 13:25:59 +03:00
Torsten Ruger
4cc1d8455e
fix util namespace
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and instruction move ripples
2018-03-26 20:05:30 +03:00
Torsten Ruger
bc4d4b428a
change boot to new hash syntax
2018-03-25 13:27:15 +03:00
Torsten Ruger
de7e02b0b8
remove IsSame branch from risc
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mixing up levels, IsSame is Mom
at risc this is a minus and Zero check
fix all tests
2018-03-24 18:54:36 +02:00
Torsten Ruger
ad3e73d931
start on dynamic call test
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fix cache entry being not loaded
test incomplete because of missing resolve_method
2018-03-24 17:55:01 +02:00
Torsten Ruger
6a538624c5
remove NotSame from risc
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instead use a - b and then isZero
2018-03-24 17:54:15 +02:00
Torsten Ruger
0f183b3a74
fix value return and test
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slot load was wrong way around
2018-03-23 20:02:17 +02:00
Torsten Ruger
6721153456
fix return sequence
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logic error of swapping messages too soon
simplify by folding message unto itself
thus only need one extra register for the address
2018-03-23 18:58:42 +02:00
Torsten Ruger
a306c464b7
start using tmp registers at 1
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which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
55832315eb
more fix for multilevel constant load
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was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
Torsten Ruger
e505856af7
fix multi level right slot load
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was done for left, but forgotten for right
2018-03-22 18:54:07 +02:00
Torsten Ruger
6e901e1718
allow setting the source for slot loads
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so we can track more exactly which instruction created the risc
2018-03-22 18:45:03 +02:00
Torsten Ruger
ca3bf6acfa
fix constants being passed down
2018-03-22 02:38:06 +05:30
Torsten Ruger
01151b4ba7
make continue labels unique
2018-03-21 22:05:51 +05:30
Torsten Ruger
f424e58715
finish the simple call
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moving jump address
2018-03-21 19:29:00 +05:30
Torsten Ruger
49880267bb
start to test call
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as per tdd noticing logic errors, have to swap message out
2018-03-21 19:20:51 +05:30
Torsten Ruger
b5ef929c9c
add method to risc function call
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just so we still know at compile time
2018-03-21 19:05:53 +05:30
Torsten Ruger
a9196e9cd6
implement simple_calls to_risc
2018-03-21 18:54:42 +05:30
Torsten Ruger
61a801b00c
Return to_risc
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remove the index from FunctionReturn, just jump to the register address
2018-03-21 15:48:50 +05:30
Torsten Ruger
fa797f722d
to_risc for NotSameCheck
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which is only used in call cache checking
some fixing, needed to add a abel for the cache check jump
2018-03-21 12:38:28 +05:30
Torsten Ruger
12c71fa394
first go at message setups translation to risc
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simplest possible implementation, ie the method and next_messages are
loaded many times.
But the layer design shines, it’s easy to understand
2018-03-21 12:20:55 +05:30
Torsten Ruger
b99fdc3425
rename jump label
2018-03-21 11:52:53 +05:30
Torsten Ruger
d98e55907e
first go at translating DynamicCall to risc
2018-03-21 11:51:10 +05:30
Torsten Ruger
48485477c2
implement one more depth for slot_load
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soon time to make some loop
fix offset with array / object layout difference
2018-03-20 23:31:20 +05:30
Torsten Ruger
8dc0950980
implement ArgumentTransfer
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also unite with the receiver which was handled incorrectly
(left as a Vool constant)
2018-03-20 22:31:39 +05:30
Torsten Ruger
77084dc894
fix unconditional jump
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and affected tests
2018-03-20 22:05:09 +05:30
Torsten Ruger
dba08ba8ce
small code climate inspired clean
2018-03-20 13:48:17 +05:30
Torsten Ruger
2c6ea7ea46
finish truth check (green again)
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some (basic) if tests
2018-03-20 13:30:38 +05:30
Torsten Ruger
63c1468e1e
bit of code docs
2018-03-19 21:19:46 +05:30
Torsten Ruger
cff6226297
own file for check
2018-03-19 21:19:26 +05:30
Torsten Ruger
99ced4369a
adding Tue False and Nil Class to Parfait
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and boot
2018-03-19 21:18:56 +05:30
Torsten Ruger
d195ef68da
move the code to load a slot_definition to a register
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so we don’t have to copy it.
2018-03-19 20:54:32 +05:30
Torsten Ruger
7953ef3e39
fix slot_load for higher order left arguments
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needed for getting args or frame of the target, for assigns
fixed ripples in tests
2018-03-19 15:47:40 +05:30
Torsten Ruger
e7b878a353
mostly finish index resolve in slot_definition
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alas, it reveals error, types may not be set correctly
2018-03-18 10:51:46 +05:30
Torsten Ruger
be79388cc5
remove dead code
2018-03-18 10:50:37 +05:30
Torsten Ruger
9c052c78a7
fix most of slot_load to_risc
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higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
642f16b73a
adding cache entry to parfait
2018-03-17 19:03:39 +05:30
Torsten Ruger
16c8fcbf66
first local assignment risc test
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comes with casualties
slot_load needs more work
2018-03-17 11:13:44 +05:30
Torsten Ruger
35a0952943
first while test working
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fixed logic error in test framework
2018-03-16 12:33:11 +05:30
Torsten Ruger
79bf416e58
collapsed slot classes into one
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different slot operation have different right sides
mom assignment tests work again
157 others don’t
2018-03-15 20:33:38 +05:30
Torsten Ruger
78ef1368de
introducing expressions and constants
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not everything statement anymore (as in ruby)
basic statement tests working, rest havoc
2018-03-15 11:24:14 +05:30
Torsten Ruger
163cad456f
random tries
2018-03-15 10:46:17 +05:30
Torsten Ruger
03a4e04f7e
rename self to receiver
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just because it is a keyword and can’t be used
2018-03-14 20:26:13 +05:30
Torsten Ruger
2533842204
add traceable dummies
2018-03-14 20:25:21 +05:30
Torsten Ruger
83d957377e
more precise
2018-03-14 17:37:27 +05:30
Torsten Ruger
b854c075b2
move each slot instruction into own file
2018-03-14 17:36:55 +05:30
