06944142d6
moving more tests to arm
...
and guess what, finding bugs (index ones)
not fixed though
2020-03-27 20:18:14 +02:00
7572e27869
fix operator register usage
...
which makes inter math work
surprise!
2020-03-25 18:38:32 +02:00
bc558d1f0d
do not copy name of method
...
so that the resolve can compare name identity
which is what is does, not equality
this (and some other bug) is crashing arm currently
2020-03-25 12:43:57 +02:00
b2dce92883
fix arm return bug
...
even had a fixme on it
2020-03-24 22:04:44 +02:00
c16ed5ab3a
fix interpreter
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by currently not checking for old register pattern
feels like wip, but passes (all but one)
2020-03-22 14:31:43 +02:00
7b9097a0b1
Fix word offset
...
which had weirdly been 1 off
(not weird that it was off, index bugs are common, but weird that the tests passed anyway)
2019-09-24 12:59:22 +03:00
0ae7c5d8aa
hacking method not found
...
was using exit, since raise is not implemented. This was ambiguous as all programs exit.
Using :died as special kernel code and bending it, and reporting it in interpreter.
2019-09-09 11:47:37 +03:00
Torsten Ruger
a095515b0e
new get_type_by_class_name helper for space
...
sorely needed, with 36 occurences replaced
2018-07-13 21:50:40 +03:00
Torsten Ruger
9005513368
rename typed_method to callable_method
...
seems to make the essence clearer
also extracted base class
2018-07-07 09:11:09 +03:00
Torsten Ruger
b804be5f70
fix dynamic call
...
which had the method in the regsiter, not the binary.
Single SlotToReg added (and some tests)
Which amazingly fixed all broken binary tests
2018-06-25 00:19:43 +03:00
Torsten Ruger
068bda492c
implement DynamicJump for Arm
...
which is in fact the same as return (moving address into pc)
2018-06-24 19:13:55 +03:00
Torsten Ruger
ce79617875
fix the exit sequence
...
was returning wrong register (1, not 0)
also saving the message for test, which changes order as the return value destroys the message
2018-06-19 19:52:06 +03:00
Torsten Ruger
9fc7f9b528
fix arm write syscall
2018-06-19 10:49:53 +03:00
Torsten Ruger
67100a3ef8
write adjusted address
...
and rename integer to address in label
1k hurray
2018-05-31 00:07:58 +03:00
Torsten Ruger
8322fca7b3
give labels an integer that will end up being the position at runtime
...
Since integers are first class objects, we need to use an integer object
as the return address. The actual address can not be stored in an
instance variable since it is not an object.
The address is unique to the label and never changes after positioning
(using the int is next up)
2018-05-29 20:26:00 +03:00
Torsten Ruger
6f0fad0957
dragging the extra through resets
...
as the binary the instruction is in may change when repositioning
2018-05-25 19:04:48 +03:00
Torsten Ruger
3c00239f36
another million index fixes
2018-05-14 15:17:04 +03:00
Torsten Ruger
1acd231a33
debugging binaries, initial jump issues
2018-04-30 13:28:55 +03:00
Torsten Ruger
beb487eb09
minor fixes
2018-04-02 19:31:08 +03:00
Torsten Ruger
6e941ebcb7
introduce load_data instruction
...
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
Torsten Ruger
1956f18faa
add an integer plus
...
not correctly handling integer objects yet
2018-03-30 17:09:02 +03:00
Torsten Ruger
7493d738e1
have to translate the labels
...
and use binary as function call target
(because we don’t have the translated label)
2018-03-28 12:50:07 +03:00
Torsten Ruger
294f4d988f
automatically create binary once cpu instructions are there
2018-03-26 19:42:15 +03:00
Torsten Ruger
279fdcc1e2
really translate risc - cpu/arm
...
also labels.
Actual translation/assembly is much cleaner
2018-03-25 19:38:59 +03:00
Torsten Ruger
8cee2db1d1
return just gets the register (no more offset)
...
use mov instead
2018-03-24 18:32:53 +02:00
Torsten Ruger
b4489b1093
rename RiscTransfer to Transfer
2018-03-21 15:48:04 +05:30
Torsten Ruger
f7aac1d1a4
polish docs
...
and a bit of code style
2018-03-11 16:11:15 +05:30
Torsten Ruger
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
Torsten Ruger
8aae8f7425
disabling failing test for now
...
have to add more test and code climate will show where
2016-12-29 21:24:11 +02:00
Torsten Ruger
4412eda105
small refactor and rename
2016-12-28 18:16:39 +02:00
Torsten Ruger
a5946cb644
same renames for bytes (set/get_byte)
2016-12-25 18:11:58 +02:00
Torsten Ruger
f648bf7bd5
rename also get_slot, to slot_to_reg
...
makes source and target clear
2016-12-25 18:05:39 +02:00
Torsten Ruger
35adf9a5e6
rename set_slot
...
set_slot was clear about the target, but not the source.
Better with reg_to_slot (and soon it’s inverse slot_to_reg)
2016-12-25 18:02:39 +02:00
Torsten Ruger
94c423c2b3
whittling arm_translator
2016-12-15 18:21:08 +02:00
Torsten Ruger
a8453c126d
use arm shift at runtime
...
arm indexes are in bytes (x4) at compile time
but at runtime we only have the array indexes, iw word indexes
arm has the nice barrel shifter to save us an extra instruction
2015-11-19 12:48:13 +02:00
Torsten Ruger
249f43ad34
translate and interpret new instructions
2015-11-19 10:09:55 +02:00
Torsten Ruger
303b7eb1f8
putstring unfolds length
...
which means sys call doesn’t need to
and also interpreter sometimes gets a symbol length
2015-11-16 18:03:29 +02:00
Torsten Ruger
f50d7b57a4
fix the putstring sys call indexing
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index 0 is the marker word , so like in some, all indexes 1 based
works :-)
2015-11-15 22:03:06 +02:00
Torsten Ruger
8e82da0b61
fix arm (assembled) indexing
...
by having a dummy 0 index in salaam. when assembled
2015-11-15 20:42:07 +02:00
Torsten Ruger
458610b970
implement string length
2015-11-15 11:28:16 +02:00
Torsten Ruger
b30cf21bbd
fix arm indexes
...
needs rethought
fixed for static use, but what about dynamic
2015-11-15 00:35:12 +02:00
Torsten Ruger
6127d92ca9
implement arm branches
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which backfired into interpreter as
plus actually means 0 or plus in arm
may still change back but for now
2015-11-14 00:20:03 +02:00
Torsten Ruger
6f0d6d831e
update arm and implement most operators
...
multiplication wasn’t implemented
and division isn’t part if arm
neither is rotate by register
2015-11-12 20:02:14 +02:00
Torsten Ruger
c38775e933
add set_internal
...
and the set_slot with register
very much like the get_slot for get_internal
2015-11-08 17:10:36 +02:00
Torsten Ruger
484e2d19d4
allow for registers in get slot
2015-11-07 19:38:03 +02:00
Torsten Ruger
c15445a958
let labels be constants
2015-11-03 16:20:25 +02:00
Torsten Ruger
3774f8a5a2
use translator and remove passes
...
the only passes that were left were reg -> arm
those are almost completely one to one, so the idea of passes didn’t fit
2015-10-24 17:11:18 +03:00
Torsten Ruger
a871f96630
remove passes and achieve the same by translating
2015-10-24 11:42:36 +03:00
