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88 Commits

Author SHA1 Message Date
Torsten Ruger
7006c8e3aa fix remaining tests 
rename ripples
 2018-06-29 22:56:49 +03:00
Torsten Ruger
c8451d0048 create rubyx dir and move previous vool_compiler there 2018-06-29 22:46:39 +03:00
Torsten Ruger
3dffebed3f rename a bit 2018-06-29 13:03:19 +03:00
Torsten Ruger
c94f6eaa78 small maintanance 2018-06-16 21:01:15 +03:00
Torsten Ruger
5ec235d049 fixes outstanding misc, All green 
Well. it's been a while, positioning is fixed (again)
apart from the upcoming BranchListener
 2018-06-10 13:19:55 +03:00
Torsten Ruger
53107d3ef8 reducing the label's int for return 
placing the raw address in the register to jump to
puts the extra instruction at the risc level (not arm), thus changing a
lot of (brittle?) tests
 2018-05-30 12:54:40 +03:00
Torsten Ruger
bf23883270 busy fixing tests 2018-05-24 19:38:48 +03:00
Torsten Ruger
f5d1090c39 no-ops really 2018-05-23 18:06:55 +03:00
Torsten Ruger
37d62d298e assemble risc to it's position (not itself) 
So in the next step the interpreter can use positions as program counter
and would be much more like the real thing
 2018-05-17 09:49:01 +03:00
Torsten Ruger
9597fc5756 more slot tests, also in separate files 2018-05-16 12:49:46 +03:00
Torsten Ruger
36e59ebdea some slot load tests 2018-05-16 12:35:44 +03:00
Torsten Ruger
473866e76b start with some slot definition tests 2018-05-15 19:29:27 +03:00
Torsten Ruger
ab4bc370ed another +1 bug 2018-05-15 16:25:55 +03:00
Torsten Ruger
3c00239f36 another million index fixes 2018-05-14 15:17:04 +03:00
Torsten Ruger
4a88f342d3 random checkin 
still suffering -1 trauma
 2018-05-14 12:38:44 +03:00
Torsten Ruger
98f3898acd fix while tests 2018-04-20 10:27:06 +03:00
Torsten Ruger
13d8a65e07 add while interpreter test 2018-04-19 19:23:12 +03:00
Torsten Ruger
1849522a54 fix TruthCheck 
mixing up the false and true, such a basic human mistake
 2018-04-19 10:34:15 +03:00
Torsten Ruger
3a50b7dd0e fix mod4 name 
really did div4
 2018-04-19 10:00:55 +03:00
Torsten Ruger
d19bd5f98d fix dynamic jump 
which gets dynamic resolve and call to work.
FIRST DYNAMIC CALL working
 2018-04-09 15:06:46 +03:00
Torsten Ruger
59e6298879 first resolved call running though 
and returning an int, as it should
just the value .  .  .
 2018-04-08 23:45:23 +03:00
Torsten Ruger
fabe4db4f6 fix logic error in vool dynamic send 
using receiver of current method
instead of receiver of next message
 2018-04-08 22:59:42 +03:00
Torsten Ruger
580c53cdae fix the resolve 
without return and not being a function
 2018-04-08 22:30:18 +03:00
Torsten Ruger
8c322329fb fix builtin methods according to last commit 2018-04-08 18:52:17 +03:00
Torsten Ruger
3c90eb31c6 fixes all but interpreter tests 2018-04-06 23:37:41 +03:00
Torsten Ruger
eea92399ee concludes static message setup 2018-04-06 23:11:08 +03:00
Torsten Ruger
1ddbde1191 return single message for "message" ie r0 
other names, like next_message allocate  a new register
 2018-04-06 22:54:54 +03:00
Torsten Ruger
41d573d571 wrought one more instruction for message setup 
now with dsl ready, should be faster
 2018-04-06 20:58:58 +03:00
Torsten Ruger
d52e14d201 continue to rewrite message_setup 
message come from space already.
next types
 2018-04-05 20:37:03 +03:00
Torsten Ruger
f09086e524 unite the two resolve_to_index functions 2018-04-05 20:10:00 +03:00
Torsten Ruger
cf6636ddda move (group) test files 2018-04-05 12:19:29 +03:00
Torsten Ruger
0a075c0f8a fix tests (from changing MethodSetup) 2018-04-03 14:31:49 +03:00
Torsten Ruger
65d57c8c7c removing unconditional 
just Branch is fine
 2018-04-02 19:30:34 +03:00
Torsten Ruger
cb9f6973d9 fix true false and nil constant 
going from mom to parfait
basics in place, more ripples to fix
 2018-03-31 13:47:02 +03:00
Torsten Ruger
ee8b9469af fix argument indexing 
good old index bug, off by one
this time forgot about parfait 1-indexing
 2018-03-30 20:01:31 +03:00
Torsten Ruger
b997f01236 simple arg test 
yields no insights
 2018-03-30 18:13:17 +03:00
Torsten Ruger
e68b28d66d fix helper 
and start on arg test
 2018-03-30 18:05:38 +03:00
Torsten Ruger
3090ccffea keep risc and cpu instructions separate in method 
that overwriting was a bit of thorn
 2018-03-25 19:33:50 +03:00
Torsten Ruger
de7e02b0b8 remove IsSame branch from risc 
mixing up levels, IsSame is Mom
at risc this is a minus and Zero check
fix all tests
 2018-03-24 18:54:36 +02:00
Torsten Ruger
a407601f5c fix tests from NotSame removal 2018-03-24 18:33:19 +02:00
Torsten Ruger
267237b776 fix init method message setup 
was causing errors in interpreter
(that may have gone unnoticed in arm, as the interpreter checks stuff)
 2018-03-24 15:59:54 +02:00
Torsten Ruger
30d2cd3af7 fix test ripples from changing return sequence 2018-03-23 20:04:29 +02:00
Torsten Ruger
f46c4d148e more return testing 2018-03-23 11:21:41 +02:00
Torsten Ruger
55832315eb more fix for multilevel constant load 
was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
 2018-03-22 19:14:22 +02:00
Torsten Ruger
02c12996b3 return test for risc 2018-03-22 02:38:41 +05:30
Torsten Ruger
ca3bf6acfa fix constants being passed down 2018-03-22 02:38:06 +05:30
Torsten Ruger
01151b4ba7 make continue labels unique 2018-03-21 22:05:51 +05:30
Torsten Ruger
e0dd4e0ad7 test dynamic call 
made cache labels unique
 2018-03-21 21:58:43 +05:30
Torsten Ruger
f424e58715 finish the simple call 
moving jump address
 2018-03-21 19:29:00 +05:30
Torsten Ruger
49880267bb start to test call 
as per tdd noticing logic errors, have to swap message out
 2018-03-21 19:20:51 +05:30