Commit Graph

8 Commits

Author SHA1 Message Date
4643be0ae6 codong RegisterSlot with reg and slot 2020-03-22 14:31:43 +02:00
Torsten Ruger
3bc85805a4 must pass registers to slot_to_reg and reg_to_slot
as they are typed, those functions don't resolve on Risc, but the register type
miscother changes from previous commits
2018-07-15 16:30:50 +03:00
Torsten Ruger
e237bc625a remove unused methods
and a whole lot more index fixes
2018-05-14 20:50:52 +03:00
Torsten Ruger
3c00239f36 another million index fixes 2018-05-14 15:17:04 +03:00
Torsten Ruger
b4489b1093 rename RiscTransfer to Transfer 2018-03-21 15:48:04 +05:30
Torsten Ruger
cddc25a595 fixing tests for shifting constants into slots 2018-03-17 21:15:38 +05:30
Torsten Ruger
79b4b07ac4 style 2018-03-14 17:39:49 +05:30
Torsten Ruger
aa79e41d1c rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00