Torsten Ruger
4cc04787e9
remove Risc.resolve_to_index
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mostly by using better typed registers,
which cleans up the code where it was used
2018-07-16 19:00:04 +03:00
Torsten Ruger
3bc85805a4
must pass registers to slot_to_reg and reg_to_slot
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as they are typed, those functions don't resolve on Risc, but the register type
miscother changes from previous commits
2018-07-15 16:30:50 +03:00
Torsten Ruger
ab8b574e9c
also recode the slot_definition resolution
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much like in the slot_load. In fact suspiciously so.
wip, as also changing to storing type (not sym) in reg
2018-07-14 22:39:00 +03:00
Torsten Ruger
58c7294abd
finish the loop in slot_load
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thus rewrite of that old nested if thing is done
2018-07-14 11:04:21 +03:00
Torsten Ruger
61c840c023
start to move slot_load code to register_value
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the iea is to iterate through register_values while reducing the slot_load to a number of Slot_to_regs
wip
2018-07-13 21:56:55 +03:00
Torsten Ruger
000bf0a9b3
separate SlotDefinition into own file
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what started as three lines has grown up to demand it’s own file and
tests
2018-05-15 19:29:06 +03:00
Torsten Ruger
df08cb78e2
adds a lot of to_ssss
2018-04-17 20:26:15 +03:00
Torsten Ruger
fabe4db4f6
fix logic error in vool dynamic send
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using receiver of current method
instead of receiver of next message
2018-04-08 22:59:42 +03:00
Torsten Ruger
6958fc31ab
rework resolve_method, using builder
2018-04-07 23:07:44 +03:00
Torsten Ruger
f09086e524
unite the two resolve_to_index functions
2018-04-05 20:10:00 +03:00
Torsten Ruger
ee0a1ca823
renaming methods args and frame
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to arguments_type and frame_type, because that is what they are
In honour of setup bug, where the types of those types were loaded,
instead of just them types
2018-04-05 12:22:14 +03:00
Torsten Ruger
a2173645b3
remove the :int shorthand
2018-03-31 19:17:55 +03:00
Torsten Ruger
9e9b5c7f37
move to parfait integers in risc layer
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loading constants means loading parfait objects
objects have to me collected in machine
integer ok, string/true/false/nil next
2018-03-31 13:25:59 +03:00
Torsten Ruger
ad3e73d931
start on dynamic call test
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fix cache entry being not loaded
test incomplete because of missing resolve_method
2018-03-24 17:55:01 +02:00
Torsten Ruger
a306c464b7
start using tmp registers at 1
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which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
55832315eb
more fix for multilevel constant load
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was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
Torsten Ruger
e505856af7
fix multi level right slot load
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was done for left, but forgotten for right
2018-03-22 18:54:07 +02:00
Torsten Ruger
6e901e1718
allow setting the source for slot loads
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so we can track more exactly which instruction created the risc
2018-03-22 18:45:03 +02:00
Torsten Ruger
ca3bf6acfa
fix constants being passed down
2018-03-22 02:38:06 +05:30
Torsten Ruger
a9196e9cd6
implement simple_calls to_risc
2018-03-21 18:54:42 +05:30
Torsten Ruger
12c71fa394
first go at message setups translation to risc
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simplest possible implementation, ie the method and next_messages are
loaded many times.
But the layer design shines, it’s easy to understand
2018-03-21 12:20:55 +05:30
Torsten Ruger
48485477c2
implement one more depth for slot_load
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soon time to make some loop
fix offset with array / object layout difference
2018-03-20 23:31:20 +05:30
Torsten Ruger
dba08ba8ce
small code climate inspired clean
2018-03-20 13:48:17 +05:30
Torsten Ruger
d195ef68da
move the code to load a slot_definition to a register
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so we don’t have to copy it.
2018-03-19 20:54:32 +05:30
Torsten Ruger
7953ef3e39
fix slot_load for higher order left arguments
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needed for getting args or frame of the target, for assigns
fixed ripples in tests
2018-03-19 15:47:40 +05:30
Torsten Ruger
e7b878a353
mostly finish index resolve in slot_definition
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alas, it reveals error, types may not be set correctly
2018-03-18 10:51:46 +05:30
Torsten Ruger
9c052c78a7
fix most of slot_load to_risc
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higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
16c8fcbf66
first local assignment risc test
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comes with casualties
slot_load needs more work
2018-03-17 11:13:44 +05:30
Torsten Ruger
79bf416e58
collapsed slot classes into one
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different slot operation have different right sides
mom assignment tests work again
157 others don’t
2018-03-15 20:33:38 +05:30
Torsten Ruger
163cad456f
random tries
2018-03-15 10:46:17 +05:30
Torsten Ruger
03a4e04f7e
rename self to receiver
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just because it is a keyword and can’t be used
2018-03-14 20:26:13 +05:30
Torsten Ruger
b854c075b2
move each slot instruction into own file
2018-03-14 17:36:55 +05:30
Torsten Ruger
20a88f9ac8
sorting mom instructions and statements into separate dirs
2018-03-13 16:51:33 +05:30
