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must pass registers to slot_to_reg and reg_to_slot

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as they are typed, those functions don't resolve on Risc, but the register type
miscother changes from previous commits
This commit is contained in:
Torsten Ruger
2018-07-15 16:30:50 +03:00
parent f31d22d901
commit 3bc85805a4
7 changed files with 27 additions and 28 deletions
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4
test/mom/send/test_send_simple_args.rb
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@ -41,7 +41,7 @@ module Risc
def test_load_args
produced = produce_body
assert_equal SlotToReg , produced.next(base+2).class
assert_equal :r3 , produced.next(base+2).register.symbol
assert_equal :r2 , produced.next(base+2).register.symbol
assert_equal :r2 , produced.next(base+2).array.symbol
assert_equal 8 , produced.next(base+2).index
end
@ -49,7 +49,7 @@ module Risc
produced = produce_body
assert_equal RegToSlot , produced.next(base+3).class
assert_equal :r1 , produced.next(base+3).register.symbol
assert_equal :r3 , produced.next(base+3).array.symbol
assert_equal :r2 , produced.next(base+3).array.symbol
assert_equal 1 , produced.next(base+3).index , "first arg must have index 1"
end
def test_load_label

8
test/risc/interpreter/calling/test_puts.rb
View File

@ -45,8 +45,8 @@ module Risc
sl = main_ticks(29)
assert_equal Transfer , sl.class
assert_equal :r0 , sl.from.symbol
assert_equal :r1 , sl.to.symbol
assert_equal 11 , @interpreter.get_register(:r1)
assert_equal :r2 , sl.to.symbol
assert_equal 11 , @interpreter.get_register(:r2)
end
def test_restore_message
sl = main_ticks(30)
@ -58,8 +58,8 @@ module Risc
def test_save_sys_return
sl = main_ticks(35)
assert_equal RegToSlot , sl.class
assert_equal :r1 , sl.register.symbol #return
assert_equal :r2 , sl.array.symbol #parfait integer
assert_equal :r2 , sl.register.symbol #return
assert_equal :r3 , sl.array.symbol #parfait integer
assert_equal 2 , sl.index
end
def test_return