must pass registers to slot_to_reg and reg_to_slot

as they are typed, those functions don't resolve on Risc, but the register type miscother changes from previous commits
2018-07-15 16:30:50 +03:00
parent f31d22d901
commit 3bc85805a4
7 changed files with 27 additions and 28 deletions
--- a/lib/mom/instruction/slot_load.rb
+++ b/lib/mom/instruction/slot_load.rb
@ -66,8 +66,7 @@ module Mom
        left = left.resolve_and_add( slot , const , compiler)
        slot = left_slots.shift
      end
-      left_index = left.resolve_index( slot )
-      const << Risc.reg_to_slot(original_source, const.register , left, left_index)
+      const << Risc.reg_to_slot(original_source, const.register , left, slot)
    end

  end