2014-08-30 18:40:37 +02:00
|
|
|
module Arm
|
2014-10-02 21:28:34 +02:00
|
|
|
class MoveInstruction < Instruction
|
2014-08-30 18:40:37 +02:00
|
|
|
include Arm::Constants
|
|
|
|
|
2014-10-02 21:28:34 +02:00
|
|
|
def initialize to , from , options = {}
|
|
|
|
super(options)
|
|
|
|
@to = to
|
2015-05-29 11:47:49 +02:00
|
|
|
@from = from
|
2014-10-02 21:28:34 +02:00
|
|
|
raise "move must have from set #{inspect}" unless from
|
2014-08-30 18:40:37 +02:00
|
|
|
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
|
|
|
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
|
|
@attributes[:opcode] = attributes[:opcode]
|
|
|
|
@operand = 0
|
|
|
|
|
2015-05-24 17:05:20 +02:00
|
|
|
@immediate = 0
|
2014-08-30 18:40:37 +02:00
|
|
|
@rn = :r0 # register zero = zero bit pattern
|
2014-09-17 16:00:19 +02:00
|
|
|
@extra = nil
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
2014-10-02 21:28:34 +02:00
|
|
|
attr_accessor :to , :from
|
|
|
|
|
2014-09-30 11:07:21 +02:00
|
|
|
# arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
|
2014-09-16 10:39:08 +02:00
|
|
|
# but not all constants fit into the part of the instruction that is left after the instruction code,
|
2015-05-24 17:05:20 +02:00
|
|
|
# so large moves have to be split into two instructions.
|
2014-09-17 16:00:19 +02:00
|
|
|
# we handle this "transparently", just this instruction looks longer
|
2014-09-18 16:05:59 +02:00
|
|
|
# alas, full transparency is not achieved as we only know when to use 2 instruction once we know where the
|
2015-05-24 17:05:20 +02:00
|
|
|
# other object is, and that position is only set after code positions have been determined (in link) and so
|
|
|
|
# see below in assemble
|
2014-09-16 16:16:13 +02:00
|
|
|
def mem_length
|
2014-09-17 16:00:19 +02:00
|
|
|
@extra ? 8 : 4
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
|
|
|
|
2014-09-16 16:16:13 +02:00
|
|
|
def assemble(io)
|
2014-08-30 18:40:37 +02:00
|
|
|
# don't overwrite instance variables, to make assembly repeatable
|
|
|
|
rn = @rn
|
|
|
|
operand = @operand
|
|
|
|
immediate = @immediate
|
|
|
|
right = @from
|
2015-05-29 11:33:40 +02:00
|
|
|
if right.is_a?(Parfait::Object)
|
2014-09-16 16:16:13 +02:00
|
|
|
r_pos = right.position
|
2014-08-30 18:40:37 +02:00
|
|
|
# do pc relative addressing with the difference to the instuction
|
2014-09-16 10:39:08 +02:00
|
|
|
# 8 is for the funny pipeline adjustment (ie pc pointing to fetch and not execute)
|
2015-05-29 11:47:49 +02:00
|
|
|
right = r_pos - self.position - 8
|
2014-10-02 15:08:24 +02:00
|
|
|
puts "Position #{r_pos} from #{self.position} = #{right}"
|
|
|
|
rn = :pc
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
2015-05-29 11:33:40 +02:00
|
|
|
if (right.is_a?(Numeric))
|
2014-09-17 15:23:29 +02:00
|
|
|
if (right.fits_u8?)
|
2014-08-30 18:40:37 +02:00
|
|
|
# no shifting needed
|
2015-05-29 11:47:49 +02:00
|
|
|
operand = right
|
2014-08-30 18:40:37 +02:00
|
|
|
immediate = 1
|
|
|
|
elsif (op_with_rot = calculate_u8_with_rr(right))
|
|
|
|
operand = op_with_rot
|
|
|
|
immediate = 1
|
|
|
|
else
|
2014-09-29 19:26:55 +02:00
|
|
|
# unfortunately i was wrong in thinking the pi is armv7. The good news is the code below implements
|
2014-09-30 11:07:21 +02:00
|
|
|
# the movw instruction (armv7 for moving a word) and works
|
2015-05-29 11:47:49 +02:00
|
|
|
#armv7 raise "Too big #{right} " if (right >> 16) > 0
|
|
|
|
#armv7 operand = (right & 0xFFF)
|
2014-09-29 19:26:55 +02:00
|
|
|
#armv7 immediate = 1
|
2015-05-29 11:47:49 +02:00
|
|
|
#armv7 rn = (right >> 12)
|
2015-05-24 17:05:20 +02:00
|
|
|
# a little STRANGE, that the armv7 movw (move a 2 byte word) is an old test opcode, but there it is
|
2014-09-30 11:07:21 +02:00
|
|
|
#armv7 @attributes[:opcode] = :tst
|
2015-05-29 11:47:49 +02:00
|
|
|
raise "No negatives implemented #{right} " if right < 0
|
2015-05-24 17:05:20 +02:00
|
|
|
# and so it continues: when we notice that the const doesn't fit, first time we raise an
|
2014-09-17 16:00:19 +02:00
|
|
|
# error,but set the extra flag, to say the instruction is now 8 bytes
|
2014-09-30 11:07:21 +02:00
|
|
|
# then on subsequent assemblies we can assemble
|
2014-09-17 16:00:19 +02:00
|
|
|
unless @extra
|
|
|
|
@extra = 1
|
2015-05-24 17:05:20 +02:00
|
|
|
raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
|
2014-09-17 16:00:19 +02:00
|
|
|
end
|
2014-09-30 11:07:21 +02:00
|
|
|
# now we can do the actual breaking of instruction, by splitting the operand
|
2015-05-29 11:47:49 +02:00
|
|
|
first = right & 0xFFFFFF00
|
2014-09-30 11:07:21 +02:00
|
|
|
operand = calculate_u8_with_rr( first )
|
|
|
|
raise "no fit for #{right}" unless operand
|
2014-09-18 16:05:59 +02:00
|
|
|
immediate = 1
|
2015-05-29 11:47:49 +02:00
|
|
|
@extra = ArmMachine.add( to , to , (right & 0xFF) )
|
2014-09-30 11:07:21 +02:00
|
|
|
#TODO: this is still a hack, as it does not encode all possible values. The way it _should_ be done
|
|
|
|
# is to check that the first part is doabe with u8_with_rr AND leaves a u8 remainder
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
2014-09-25 19:28:40 +02:00
|
|
|
elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterReference))
|
2015-05-24 17:05:20 +02:00
|
|
|
operand = reg_code(right)
|
2014-08-30 18:40:37 +02:00
|
|
|
immediate = 0 # ie not immediate is register
|
|
|
|
else
|
2014-09-27 13:59:16 +02:00
|
|
|
raise "invalid operand argument #{right.class} , #{self.class}"
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
|
|
|
op = shift_handling
|
|
|
|
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
|
|
|
val = shift(operand , 0)
|
2014-09-16 10:39:08 +02:00
|
|
|
val |= shift(op , 0) # any barrel action, is already shifted
|
2015-05-24 17:05:20 +02:00
|
|
|
val |= shift(reg_code(@to) , 12)
|
|
|
|
val |= shift(reg_code(rn) , 12+4)
|
|
|
|
val |= shift(@attributes[:update_status] , 12+4+4)#20
|
2014-08-30 18:40:37 +02:00
|
|
|
val |= shift(op_bit_code , 12+4+4 +1)
|
2015-05-24 17:05:20 +02:00
|
|
|
val |= shift(immediate , 12+4+4 +1+4)
|
|
|
|
val |= shift(instuction_class , 12+4+4 +1+4+1)
|
2014-08-30 18:40:37 +02:00
|
|
|
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
|
|
|
|
io.write_uint32 val
|
2014-09-18 16:05:59 +02:00
|
|
|
# by now we have the extra add so assemble that
|
|
|
|
if(@extra)
|
2015-05-24 17:05:20 +02:00
|
|
|
@extra.assemble(io)
|
2014-09-30 11:07:21 +02:00
|
|
|
#puts "Assemble extra at #{val.to_s(16)}"
|
2014-09-18 16:05:59 +02:00
|
|
|
end
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
|
|
|
def shift val , by
|
|
|
|
raise "Not integer #{val}:#{val.class} in #{inspect}" unless val.is_a? Fixnum
|
|
|
|
val << by
|
|
|
|
end
|
2014-10-02 21:28:34 +02:00
|
|
|
|
|
|
|
def uses
|
|
|
|
@from.is_a?(Constant) ? [] : [@from.register]
|
|
|
|
end
|
|
|
|
def assigns
|
|
|
|
[@to.register]
|
|
|
|
end
|
2014-08-30 18:40:37 +02:00
|
|
|
end
|
2015-05-24 17:05:20 +02:00
|
|
|
end
|