fix arm tests

This commit is contained in:
Torsten Ruger 2015-05-29 12:47:49 +03:00
parent 73e5ec550a
commit 3e9e650764
7 changed files with 37 additions and 31 deletions

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@ -22,7 +22,7 @@ module Arm
}
#return the bit patter that the cpu uses for the current instruction @attributes[:opcode]
def op_bit_code
bit_code = OPCODES[opcode]
bit_code = OPCODES[opcode]
bit_code or raise "no code found for #{opcode} #{inspect}"
end
@ -43,7 +43,7 @@ module Arm
def cond_bit_code
COND_CODES[@attributes[:condition_code]] or throw "no code found for #{@attributes[:condition_code]}"
end
REGISTERS = { 'r0' => 0, 'r1' => 1, 'r2' => 2, 'r3' => 3, 'r4' => 4, 'r5' => 5,
'r6' => 6, 'r7' => 7, 'r8' => 8, 'r9' => 9, 'r10' => 10, 'r11' => 11,
'r12' => 12, 'r13' => 13, 'r14' => 14, 'r15' => 15, 'a1' => 0, 'a2' => 1,
@ -56,7 +56,7 @@ module Arm
Arm::Register.new(r_name.to_sym , code )
end
def reg_code r_name
raise "double r #{r_name}" if( :rr1 == r_name)
raise "double r #{r_name}" if( :rr1 == r_name)
if r_name.is_a? ::Register::RegisterReference
r_name = r_name.symbol
end
@ -69,7 +69,7 @@ module Arm
end
def calculate_u8_with_rr(arg)
parts = arg.integer.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
parts = arg.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
pre_zeros = parts[0].length
imm_len = parts[1].length
if ((pre_zeros+imm_len) % 2 == 1)
@ -78,7 +78,7 @@ module Arm
else
u8_imm = parts[1].to_i(2)
end
if (Virtual::IntegerConstant.new(u8_imm).fits_u8?)
if u8_imm.fits_u8?
# can do!
rot_imm = (pre_zeros+imm_len) / 2
if (rot_imm > 15)
@ -89,7 +89,7 @@ module Arm
return nil
end
end
#slighly wrong place for this code, but since the module gets included in instructions anyway . . .
# implement the barrel shifter on the operand (which is set up before as an integer)
def shift_handling
@ -99,12 +99,13 @@ module Arm
{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
long = "shift_#{short}".to_sym
if shif = @attributes[long]
shif = shif.integer if (shif.is_a?(Virtual::IntegerConstant))
if (shif.is_a?(Virtual::Integer))
raise "should not be supported, check code #{inspect}"
bin |= 0x1;
shift = shif.register << 1
end
# TODO delete this code, AFTER you understand it
# tests do pass without it, maybe need more tests ?
#if (shif.is_a?(Numeric))
# raise "should not be supported, check code #{inspect}"
# bin |= 0x1;
# shift = shif.register << 1
# end
raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
op |= shift(bin , 4 )
op |= shift(shif , 4+3)
@ -120,4 +121,4 @@ module Arm
end
end
end
end

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@ -54,7 +54,7 @@ module Arm
when :swi
arg = @first
if (arg.is_a?(Numeric))
packed = [arg.integer].pack('L')[0,3]
packed = [arg].pack('L')[0,3]
io << packed
io.write_uint8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
else

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@ -33,7 +33,7 @@ module Arm
if (arg.is_a?(Numeric))
if (arg.fits_u8?)
# no shifting needed
operand = arg.integer
operand = arg
immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(arg))
operand = op_with_rot

View File

@ -36,7 +36,7 @@ module Arm
if (right.is_a?(Numeric))
if (right.fits_u8?)
# no shifting needed
operand = right.integer
operand = right
immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(right))
operand = op_with_rot

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@ -5,7 +5,7 @@ module Arm
def initialize to , from , options = {}
super(options)
@to = to
@from = from #from.is_a?(Fixnum) ? Virtual::IntegerConstant.new(from) : from
@from = from
raise "move must have from set #{inspect}" unless from
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@ -14,7 +14,6 @@ module Arm
@immediate = 0
@rn = :r0 # register zero = zero bit pattern
@from = Virtual::IntegerConstant.new( @from ) if( @from.is_a? Fixnum )
@extra = nil
end
attr_accessor :to , :from
@ -40,14 +39,14 @@ module Arm
r_pos = right.position
# do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie pc pointing to fetch and not execute)
right = Virtual::IntegerConstant.new( r_pos - self.position - 8 )
right = r_pos - self.position - 8
puts "Position #{r_pos} from #{self.position} = #{right}"
rn = :pc
end
if (right.is_a?(Numeric))
if (right.fits_u8?)
# no shifting needed
operand = right.integer
operand = right
immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(right))
operand = op_with_rot
@ -55,13 +54,13 @@ module Arm
else
# unfortunately i was wrong in thinking the pi is armv7. The good news is the code below implements
# the movw instruction (armv7 for moving a word) and works
#armv7 raise "Too big #{right.integer} " if (right.integer >> 16) > 0
#armv7 operand = (right.integer & 0xFFF)
#armv7 raise "Too big #{right} " if (right >> 16) > 0
#armv7 operand = (right & 0xFFF)
#armv7 immediate = 1
#armv7 rn = (right.integer >> 12)
#armv7 rn = (right >> 12)
# a little STRANGE, that the armv7 movw (move a 2 byte word) is an old test opcode, but there it is
#armv7 @attributes[:opcode] = :tst
raise "No negatives implemented #{right} " if right.integer < 0
raise "No negatives implemented #{right} " if right < 0
# and so it continues: when we notice that the const doesn't fit, first time we raise an
# error,but set the extra flag, to say the instruction is now 8 bytes
# then on subsequent assemblies we can assemble
@ -70,11 +69,11 @@ module Arm
raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
end
# now we can do the actual breaking of instruction, by splitting the operand
first = Virtual::IntegerConstant.new(right.integer & 0xFFFFFF00)
first = right & 0xFFFFFF00
operand = calculate_u8_with_rr( first )
raise "no fit for #{right}" unless operand
immediate = 1
@extra = ArmMachine.add( to , to , (right.integer & 0xFF) )
@extra = ArmMachine.add( to , to , (right & 0xFF) )
#TODO: this is still a hack, as it does not encode all possible values. The way it _should_ be done
# is to check that the first part is doabe with u8_with_rr AND leaves a u8 remainder
end

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@ -14,3 +14,9 @@ require "virtual/passes/frame_implementation"
Sof::Volotile.add(Virtual::Block , [:method])
Sof::Volotile.add(Virtual::CompiledMethodInfo , [:current])
class Fixnum
def fits_u8?
self >= 0 and self <= 255
end
end

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@ -23,7 +23,7 @@ class TestMoves < MiniTest::Test
code = @machine.mov :r0, 0x222 # is not 8 bit and can't be rotated by the arm system in one instruction
code.set_position(0)
begin # mov 512(0x200) = e3 a0 0c 02 add 34(0x22) = e2 80 00 22
assert_code code , :mov , [ 0x02,0x0c,0xa0,0xe3 , 0x22,0x00,0x80,0xe2]
assert_code code , :mov , [ 0x02,0x0c,0xa0,0xe3 , 0x22,0x00,0x80,0xe2]
rescue Register::LinkException
retry
end
@ -33,7 +33,7 @@ class TestMoves < MiniTest::Test
assert_code code , :mvn , [0x05,0x10,0xe0,0xe3] #e3 e0 10 05
end
def test_constant_small # like test_mov
const = Virtual::ObjectConstant.new
const = Virtual.new_word "harvey"
const.set_position( 13 ) # 13 = 5 + 8 , 8 for the arm pipeline offset, gets subtracted
code = @machine.mov :r1 , 5
code.set_position(0)
@ -41,12 +41,12 @@ class TestMoves < MiniTest::Test
assert_code code , :mov , [0x05,0x10,0xa0,0xe3] #e3 ef 10 05
end
def test_constant_big # like test_mov_big
const = Virtual::ObjectConstant.new
const = Virtual.new_word "harvey"
const.set_position( 0x222 )
code = @machine.mov :r0 , 0x222
code = @machine.mov :r0 , 0x222
code.set_position(0)
begin # mov 512(0x200) = e3 a0 0c 02 add 34(0x22) = e2 80 00 22
assert_code code , :mov , [ 0x02,0x0c,0xa0,0xe3 , 0x22,0x00,0x80,0xe2]
assert_code code , :mov , [ 0x02,0x0c,0xa0,0xe3 , 0x22,0x00,0x80,0xe2]
rescue Register::LinkException
retry
end