49 lines
1.7 KiB
Markdown
49 lines
1.7 KiB
Markdown
Risc Machine
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The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with
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normal instruction names. It is not however an abstraction of existing hardware, but only
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of that subset that we need.
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Our primary objective is to compile typed code to this level, so the register machine has:
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- object access instructions
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- object load
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- object oriented call semantics
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- extended (and extensible) branching
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- normal integer operators (but no sub word instructions)
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All data is in objects.
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The register machine is aware of Parfait objects, and specifically uses Message and Frame to
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express call semantics.
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Calls and syscalls
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------------------
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The RiscMachine only uses 1 fixed register, the currently worked on Message.
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There is no stack, rather messages form a linked list, and preparing to call, the data is pre-filled
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into the next message. Calling then means moving the new message to the current one and jumping
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to the address of the method. Returning is the somewhat reverse process.
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Syscalls are implemented by *one* Syscall instruction. The Risc machine does not specify/limit
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the meaning or number of syscalls. This is implemented by the level below, eg the arm/interpreter.
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Interpreter
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===========
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There is an interpreter that can interpret compiled register machine programs.
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This is very handy for debugging (an nothing else).
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Even more handy is the graphical interface for the interpreter, which is in it's own repository:
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salama-debugger.
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Arm / Elf
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=========
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There is also a (very strightforward) transformation to arm instructions.
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Together with the also quite minimal elf module, arm binaries can be produced.
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These binaries have no external dependencies and in fact can not even call c at the moment
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(only syscalls :-)).
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