264 lines
7.2 KiB
Ruby
264 lines
7.2 KiB
Ruby
module Intel
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##
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# MachineCodeX86 is a concrete implementation of a machine to create
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# X86 assembly code on.
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#
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# To use this:
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#
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# a) you can instantiate an instance and use its register variables
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# to build up machine code in the @stream variable and then use
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# those bytes in any way that you see fit, or
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#
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#
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# == Using MachineCodeX86 for scripting
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#
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# This is the long hand way of writing assembly code, since you
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# always include a receiver with every command.
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#
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# asm = Assembler.MachineCodeX86.new
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#
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# Once you have an assembler, you can access the registers and send
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# commands to them, eg:
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#
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# asm.eax.mov 1
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#
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# As you send the commands, the @stream will build up containing the
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# X86 assembler bytes you can use. You can use memory addresses in
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# your assembler code with the #m method, eg:
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#
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# asm.eax.m.mov 1
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#
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# Once you are finished, you simply send:
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#
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# asm.stream
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#
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# This will return you the stream of bytes.
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#
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# == Labels & Jumps
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#
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# You can do labels and jump to them using two different label
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# commands. The first is #label, which places a label jump point
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# immediately on call, eg:
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#
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# label = asm.label
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# label.jmp
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#
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# The other is a future label that can be placed at some future
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# point in the program and jumped too
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#
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# label = asm.future_label
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# asm.eax.xor asm.eax
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# label.jmp
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# asm.eax.inc
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# label.plant
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#
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# You #plant the future label where you want it to actually be and
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# past references to it will be updated. Future labels will always
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# use a dword jmp so that there's space to fill in the command if
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# the jmp ends up being far.
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class MachineCodeX86
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attr_accessor :stream, :procedure, :bits, :cachedInstructions
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attr_reader :processors
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attr_writer :instructions
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def initialize
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self.procedure = nil
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self.bits = self.defaultBits
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self.processors = self.defaultProcessors
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self.stream = []
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self.setupMachine
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end
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def inspect
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"#{self.class}#{stream.inspect}"
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end
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def processors= o
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@processors = o
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@cachedInstructions = nil
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end
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def supportsProcessor instructionProcessors
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# TODO: can still be improved. hashes, caching... something
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! (processors & instructionProcessors).empty?
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end
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def instructions
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self.cachedInstructions ||= @instructions.select { |e|
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self.supportsProcessor e.processors
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}
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self.cachedInstructions
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end
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def method_missing msg, *args
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ok = Instruction.new( [msg, *args] , self).assemble
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return super unless ok
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ok
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end
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def label
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Label.new(self, stream.size)
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end
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def future_label
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FutureLabel.new self
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end
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def assemble instruction
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raise "no"
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# aBlock on: MessageNotUnderstood do: [:ex |
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# ex originator class = BlockClosure ifFalse: [ex pass].
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# ex resume: (ex originator value m perform: ex parameter selector withArguments: ex parameter arguments)]</body>
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end
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# registers-general-32bit
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attr_accessor :eax, :ebx, :ebp, :esp, :edi, :esi, :ecx, :edx
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# registers-fpu
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attr_accessor :st0, :st1, :st2, :st3, :st4, :st5, :st6, :st7
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# registers-debug
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attr_accessor :dr0, :dr1, :dr2, :dr3, :dr6, :dr7
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# registers-segment
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attr_accessor :es, :ss, :cs, :gs, :fs, :ds
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# registers-test
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attr_accessor :tr3, :tr4, :tr5, :tr6, :tr7
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# registers-general-8bit
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attr_accessor :al, :ah, :bl, :bh, :cl, :ch, :dl, :dh
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# registers-general-16bit
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attr_accessor :ax, :bx, :cx, :dx, :sp, :bp, :si, :di
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# registers-control
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attr_accessor :cr0, :cr2, :cr3, :cr4
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# registers-mmx
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attr_accessor :mm0, :mm1, :mm2, :mm3, :mm4, :mm5, :mm6, :mm7
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def setupFPURegisters
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self.st0 = FPURegister.new self, 0
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self.st1 = FPURegister.new self, 1
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self.st2 = FPURegister.new self, 2
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self.st3 = FPURegister.new self, 3
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self.st4 = FPURegister.new self, 4
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self.st5 = FPURegister.new self, 5
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self.st6 = FPURegister.new self, 6
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self.st7 = FPURegister.new self, 7
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end
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def setupControlRegisters
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self.cr0 = ControlRegister.new self, 0
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self.cr2 = ControlRegister.new self, 2
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self.cr3 = ControlRegister.new self, 3
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self.cr4 = ControlRegister.new self, 4
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end
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def platform
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'i386'
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end
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def setupDebugRegisters
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self.dr0 = DebugRegister.new self, 0
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self.dr1 = DebugRegister.new self, 1
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self.dr2 = DebugRegister.new self, 2
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self.dr3 = DebugRegister.new self, 3
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self.dr6 = DebugRegister.new self, 6
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self.dr7 = DebugRegister.new self, 7
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end
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def defaultBits
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32
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end
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def setupSegmentRegisters
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self.es = SegmentRegister.new self, 0
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self.cs = SegmentRegister.new self, 1
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self.ss = SegmentRegister.new self, 2
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self.ds = SegmentRegister.new self, 3
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self.fs = SegmentRegister.new self, 4
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self.gs = SegmentRegister.new self, 5
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end
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def defaultProcessors
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%w(8086 186 286 386 486 PENT P6 CYRIX FPU MMX PRIV UNDOC)
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end
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def setupMachine
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self.instructions = Assembler.commands
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self.setup8BitRegisters
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self.setup16BitRegisters
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self.setup32BitRegisters
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self.setupSegmentRegisters
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self.setupControlRegisters
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self.setupTestRegisters
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self.setupDebugRegisters
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self.setupFPURegisters
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self.setupMMXRegisters
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end
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def setup8BitRegisters
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self.al = Register.new self, 0, 8
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self.cl = Register.new self, 1, 8
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self.dl = Register.new self, 2, 8
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self.bl = Register.new self, 3, 8
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self.ah = Register.new self, 4, 8
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self.ch = Register.new self, 5, 8
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self.dh = Register.new self, 6, 8
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self.bh = Register.new self, 7, 8
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end
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def setup16BitRegisters
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self.ax = Register.new self, 0, 16
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self.cx = Register.new self, 1, 16
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self.dx = Register.new self, 2, 16
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self.bx = Register.new self, 3, 16
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self.sp = Register.new self, 4, 16
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self.bp = Register.new self, 5, 16
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self.si = Register.new self, 6, 16
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self.di = Register.new self, 7, 16
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end
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def setupMMXRegisters
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self.mm0 = MMXRegister.new self, 0
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self.mm1 = MMXRegister.new self, 1
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self.mm2 = MMXRegister.new self, 2
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self.mm3 = MMXRegister.new self, 3
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self.mm4 = MMXRegister.new self, 4
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self.mm5 = MMXRegister.new self, 5
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self.mm6 = MMXRegister.new self, 6
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self.mm7 = MMXRegister.new self, 7
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end
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def setupTestRegisters
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self.tr3 = TestRegister.new self, 3
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self.tr4 = TestRegister.new self, 4
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self.tr5 = TestRegister.new self, 5
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self.tr6 = TestRegister.new self, 6
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self.tr7 = TestRegister.new self, 7
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end
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def setup32BitRegisters
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self.eax = Register.new self, 0, 32
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self.ecx = Register.new self, 1, 32
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self.edx = Register.new self, 2, 32
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self.ebx = Register.new self, 3, 32
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self.esp = Register.new self, 4, 32
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self.ebp = Register.new self, 5, 32
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self.esi = Register.new self, 6, 32
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self.edi = Register.new self, 7, 32
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end
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def arg n
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ebp + (n+3) * 4
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end
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end
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end |