Torsten Ruger 279fdcc1e2 really translate risc - cpu/arm ...

also labels.
Actual translation/assembly is much cleaner

2018-03-25 19:38:59 +03:00

..

branch.rb

remove IsSame branch from risc

2018-03-24 18:54:36 +02:00

byte_to_reg.rb

rename register to risc

2017-01-19 09:02:29 +02:00

function_call.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

function_return.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

getter.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

label.rb

really translate risc - cpu/arm

2018-03-25 19:38:59 +03:00

load_constant.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

operator_instruction.rb

change operators to symbols

2018-03-24 17:53:27 +02:00

reg_to_byte.rb

rename register to risc

2017-01-19 09:02:29 +02:00

reg_to_slot.rb

rename RiscTransfer to Transfer

2018-03-21 15:48:04 +05:30

setter.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

slot_to_reg.rb

rename RiscTransfer to Transfer

2018-03-21 15:48:04 +05:30

syscall.rb

add source to the to_s

2018-03-22 18:38:19 +02:00

transfer.rb

add source to the to_s

2018-03-22 18:38:19 +02:00