Torsten Ruger
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d50893bb0f
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rename risc_value to register_value
almost to register, but it still carries that value
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2018-06-29 11:39:07 +03:00 |
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Torsten Ruger
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b804be5f70
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fix dynamic call
which had the method in the regsiter, not the binary.
Single SlotToReg added (and some tests)
Which amazingly fixed all broken binary tests
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2018-06-25 00:19:43 +03:00 |
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Torsten Ruger
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c5b3c3f106
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give arm own instruction base class back
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2018-03-26 20:04:39 +03:00 |
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Torsten Ruger
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aa79e41d1c
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rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
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2017-01-19 09:02:29 +02:00 |
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Torsten Ruger
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b094bcc64f
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rename unit and sint to human readable forms
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2016-12-31 18:45:22 +02:00 |
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Torsten Ruger
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5cd05f6135
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refactor memory instruction (needs better tests)
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2016-12-16 15:40:52 +02:00 |
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Torsten Ruger
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b2579a2b82
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dead code removal
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2016-12-16 01:31:38 +02:00 |
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Torsten Ruger
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b93f207638
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some common instruction extration
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2016-12-15 12:38:22 +02:00 |
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Torsten Ruger
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ec2b0a563e
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bunch of method extraction on instructions
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2016-12-14 21:53:26 +02:00 |
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Torsten Ruger
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b3eeb7db21
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memory instruction refactor (small)
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2016-12-14 21:05:24 +02:00 |
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Torsten Ruger
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c1d23a8d48
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whitespace round plusses
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2016-12-14 19:57:09 +02:00 |
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Torsten Ruger
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bf4ddd16ee
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remove dead code
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2016-12-14 19:06:48 +02:00 |
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Torsten Ruger
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456e9b1ec0
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folded salama-arm in
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2016-12-14 13:43:13 +02:00 |
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Torsten Ruger
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f4f703975b
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removed arm and use as gem
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2015-07-18 14:12:20 +03:00 |
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Torsten Ruger
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336e6c18de
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register reference creation got more complicated
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2015-06-01 08:34:17 +03:00 |
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Torsten Ruger
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33d464f032
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minor
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2015-05-30 11:56:47 +03:00 |
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Torsten Ruger
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a46b2d5c56
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update to use parfait not virtual
more ripples
reverting to integers (not virtual::integer)
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2015-05-29 12:33:40 +03:00 |
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Torsten Ruger
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1be71918a5
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move all arm instructions to own folder and fold inheritance
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2014-10-02 22:28:34 +03:00 |
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