b804be5f70
fix dynamic call
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which had the method in the regsiter, not the binary.
Single SlotToReg added (and some tests)
Which amazingly fixed all broken binary tests
2018-06-25 00:19:43 +03:00
db459fcd3d
fix label loading in arm
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was still loading the integer address
instead of the return address's address
Hello World working
2018-06-19 17:35:00 +03:00
956c2ebe54
make arm use branch_lsteners
2018-06-19 10:51:03 +03:00
3298651238
split create_binary into two phases
...
Which gives instructions a chance to check everything
and in Arms case check the constant loads/ instruction adding
So that during assembly no more change happens (and we don't have to reassemble)
2018-06-17 13:53:17 +03:00
c22aff4c4f
start on insertion events and handling
2018-06-06 10:00:07 +03:00
4ab6d62acf
small arm fixes etc
2018-06-06 00:53:41 +03:00
d7b3368b28
fix some pesty errors
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need to fix instruction overlap beofre interpreter starts again
2018-06-05 19:05:12 +03:00
8d953a619f
propagate instruction positions
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still overlapping onto binaries, but a start
2018-06-05 18:11:25 +03:00
c2d450f779
fold position module and object position
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simpler that way, aslo code is moving to listners
2018-06-02 21:59:41 +03:00
24f6e30b54
start on redoing instruction positions
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using insruction listeners (wip)
2018-06-02 21:20:15 +03:00
0e155315aa
movs is not allowed into pc
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Illegal instruction it says
Otherwise the status update is nice (for branches) and we’ll keep
2018-05-31 14:03:25 +03:00
67100a3ef8
write adjusted address
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and rename integer to address in label
1k hurray
2018-05-31 00:07:58 +03:00
0dc89c772a
get the label int to work consistently
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still need to use it in the return
2018-05-30 10:54:18 +03:00
074ec34659
wip, fixed some label, need more fixing
2018-05-30 10:29:38 +03:00
b81d9565de
fix binary code offset when calling
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in other words, remember the arm pipeline being 8
2018-05-29 17:03:20 +03:00
6a1528e75a
Fix instruction resetting
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which happens on insert of a new instruction
2018-05-08 20:53:48 +03:00
7ca7e92dda
remove link exception class
2018-05-08 20:22:04 +03:00
ce3cc72f9e
move all position setting into position
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Position and subclasses handle the logic, external to
the classes, so it can be swapped out later
(at runtime positions can’t change)
2018-05-07 22:30:43 +03:00
68fb9b1bdc
rename Position get/set
2018-05-06 20:04:02 +03:00
e89c4d1ce1
pass binary that arm instruction belongs to in
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at least to first. repositioning and stuff next
2018-05-06 19:56:36 +03:00
6b7e1e3932
remove link exception raise
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need to fix move logic next
2018-05-05 23:55:50 +03:00
d65a982454
start by moving positioned(module) to position(class)
2018-05-05 19:47:18 +03:00
43d5521cfc
debugging positions
2018-05-05 19:32:01 +03:00
30ca70e042
remove extra instruction and use next instead
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was messing with binary writing as the assumption of 1 word writes is
baked in
2018-04-03 14:46:07 +03:00
7cf253ad9c
change assembler to write binary code objects
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also all debug in hex
2018-03-29 12:16:27 +03:00
606e3f8cb3
fix calling to binaries
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used to be to the method, but we assemble the method to its own
position.
Throw in a test for binary calling
2018-03-28 13:00:03 +03:00
2e57674008
remove io.write_unsigned_8
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and replace with write_unsigned_32, so that is the only used
method from the stream
Next up, replace the actual “stream” with a binary code writer
2018-03-27 19:37:52 +03:00
c5b3c3f106
give arm own instruction base class back
2018-03-26 20:04:39 +03:00
aa79e41d1c
rename register to risc
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seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
0397d4064d
fix all positioned uses as helper (not included anymore)
2017-01-01 21:52:55 +02:00
b094bcc64f
rename unit and sint to human readable forms
2016-12-31 18:45:22 +02:00
5cd05f6135
refactor memory instruction (needs better tests)
2016-12-16 15:40:52 +02:00
b2579a2b82
dead code removal
2016-12-16 01:31:38 +02:00
fd519314cb
strip down compare instruction
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not really used, using conditional branches instead.
(in arm any instruction can execute conditionally)
2016-12-16 00:41:37 +02:00
884bf23e5f
fix elf test
2016-12-15 17:57:45 +02:00
b93f207638
some common instruction extration
2016-12-15 12:38:22 +02:00
fdefb8e7a5
more refactoring on compare
2016-12-15 12:38:03 +02:00
ec2b0a563e
bunch of method extraction on instructions
2016-12-14 21:53:26 +02:00
55c108a8d7
refactor move_instruction a bit
2016-12-14 21:13:41 +02:00
b3eeb7db21
memory instruction refactor (small)
2016-12-14 21:05:24 +02:00
6eea3f2b2a
refactor logic instruction
2016-12-14 20:31:37 +02:00
c1d23a8d48
whitespace round plusses
2016-12-14 19:57:09 +02:00
27e7a362db
comment unused code
2016-12-14 19:52:08 +02:00
56bf875f36
refactor call_instruction
2016-12-14 19:07:03 +02:00
bf4ddd16ee
remove dead code
2016-12-14 19:06:48 +02:00
456e9b1ec0
folded salama-arm in
2016-12-14 13:43:13 +02:00
f4f703975b
removed arm and use as gem
2015-07-18 14:12:20 +03:00
e1c19dee80
remove old to_asm
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very strange that is was called in 1.9 but not 2.0
2.0 seems to delay interpolating strings
2015-07-18 12:15:07 +03:00
f5136b6b68
minor formatting
2015-07-18 11:52:30 +03:00
b670e058a9
fixes to get opal to work
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opal has bug with << and |=, but changing syntax works
2015-07-12 10:01:45 +03:00
