Commit Graph

22 Commits

Author SHA1 Message Date
Torsten Ruger
a2173645b3 remove the :int shorthand 2018-03-31 19:17:55 +03:00
Torsten Ruger
9e9b5c7f37 move to parfait integers in risc layer
loading constants means loading parfait objects
objects have to me collected in machine
integer ok, string/true/false/nil next
2018-03-31 13:25:59 +03:00
Torsten Ruger
ad3e73d931 start on dynamic call test
fix cache entry being not loaded
test incomplete because of missing resolve_method
2018-03-24 17:55:01 +02:00
Torsten Ruger
a306c464b7 start using tmp registers at 1
which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
55832315eb more fix for multilevel constant load
was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
Torsten Ruger
e505856af7 fix multi level right slot load
was done for left, but forgotten for right
2018-03-22 18:54:07 +02:00
Torsten Ruger
6e901e1718 allow setting the source for slot loads
so we can track more exactly which instruction created the risc
2018-03-22 18:45:03 +02:00
Torsten Ruger
ca3bf6acfa fix constants being passed down 2018-03-22 02:38:06 +05:30
Torsten Ruger
a9196e9cd6 implement simple_calls to_risc 2018-03-21 18:54:42 +05:30
Torsten Ruger
12c71fa394 first go at message setups translation to risc
simplest possible implementation, ie the method and next_messages are
loaded many times.

But the layer design shines, it’s easy to understand
2018-03-21 12:20:55 +05:30
Torsten Ruger
48485477c2 implement one more depth for slot_load
soon time to make some loop
fix offset with array / object layout difference
2018-03-20 23:31:20 +05:30
Torsten Ruger
dba08ba8ce small code climate inspired clean 2018-03-20 13:48:17 +05:30
Torsten Ruger
d195ef68da move the code to load a slot_definition to a register
so we don’t have to copy it.
2018-03-19 20:54:32 +05:30
Torsten Ruger
7953ef3e39 fix slot_load for higher order left arguments
needed for getting args or frame of the target, for assigns
fixed ripples in tests
2018-03-19 15:47:40 +05:30
Torsten Ruger
e7b878a353 mostly finish index resolve in slot_definition
alas, it reveals error, types may not be set correctly
2018-03-18 10:51:46 +05:30
Torsten Ruger
9c052c78a7 fix most of slot_load to_risc
higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
16c8fcbf66 first local assignment risc test
comes with casualties
slot_load needs more work
2018-03-17 11:13:44 +05:30
Torsten Ruger
79bf416e58 collapsed slot classes into one
different slot operation have different right sides
mom assignment tests work again
157 others don’t
2018-03-15 20:33:38 +05:30
Torsten Ruger
163cad456f random tries 2018-03-15 10:46:17 +05:30
Torsten Ruger
03a4e04f7e rename self to receiver
just because it is a keyword and can’t be used
2018-03-14 20:26:13 +05:30
Torsten Ruger
b854c075b2 move each slot instruction into own file 2018-03-14 17:36:55 +05:30
Torsten Ruger
20a88f9ac8 sorting mom instructions and statements into separate dirs 2018-03-13 16:51:33 +05:30