8322fca7b3
give labels an integer that will end up being the position at runtime
...
Since integers are first class objects, we need to use an integer object
as the return address. The actual address can not be stored in an
instance variable since it is not an object.
The address is unique to the label and never changes after positioning
(using the int is next up)
2018-05-29 20:26:00 +03:00
b81d9565de
fix binary code offset when calling
...
in other words, remember the arm pipeline being 8
2018-05-29 17:03:20 +03:00
6f0fad0957
dragging the extra through resets
...
as the binary the instruction is in may change when repositioning
2018-05-25 19:04:48 +03:00
3c00239f36
another million index fixes
2018-05-14 15:17:04 +03:00
232fe67c09
introduce platform to abstract cpu and load address
2018-05-12 18:32:10 +03:00
6a1528e75a
Fix instruction resetting
...
which happens on insert of a new instruction
2018-05-08 20:53:48 +03:00
7ca7e92dda
remove link exception class
2018-05-08 20:22:04 +03:00
ce3cc72f9e
move all position setting into position
...
Position and subclasses handle the logic, external to
the classes, so it can be swapped out later
(at runtime positions can’t change)
2018-05-07 22:30:43 +03:00
68fb9b1bdc
rename Position get/set
2018-05-06 20:04:02 +03:00
e89c4d1ce1
pass binary that arm instruction belongs to in
...
at least to first. repositioning and stuff next
2018-05-06 19:56:36 +03:00
6b7e1e3932
remove link exception raise
...
need to fix move logic next
2018-05-05 23:55:50 +03:00
d65a982454
start by moving positioned(module) to position(class)
2018-05-05 19:47:18 +03:00
43d5521cfc
debugging positions
2018-05-05 19:32:01 +03:00
1acd231a33
debugging binaries, initial jump issues
2018-04-30 13:28:55 +03:00
30ca70e042
remove extra instruction and use next instead
...
was messing with binary writing as the assumption of 1 word writes is
baked in
2018-04-03 14:46:07 +03:00
beb487eb09
minor fixes
2018-04-02 19:31:08 +03:00
a2173645b3
remove the :int shorthand
2018-03-31 19:17:55 +03:00
6e941ebcb7
introduce load_data instruction
...
which just loads data to a register (used internally)
as opposed to integers, which are objects
2018-03-31 12:38:30 +03:00
1956f18faa
add an integer plus
...
not correctly handling integer objects yet
2018-03-30 17:09:02 +03:00
7cf253ad9c
change assembler to write binary code objects
...
also all debug in hex
2018-03-29 12:16:27 +03:00
606e3f8cb3
fix calling to binaries
...
used to be to the method, but we assemble the method to its own
position.
Throw in a test for binary calling
2018-03-28 13:00:03 +03:00
7493d738e1
have to translate the labels
...
and use binary as function call target
(because we don’t have the translated label)
2018-03-28 12:50:07 +03:00
2e57674008
remove io.write_unsigned_8
...
and replace with write_unsigned_32, so that is the only used
method from the stream
Next up, replace the actual “stream” with a binary code writer
2018-03-27 19:37:52 +03:00
c5b3c3f106
give arm own instruction base class back
2018-03-26 20:04:39 +03:00
294f4d988f
automatically create binary once cpu instructions are there
2018-03-26 19:42:15 +03:00
279fdcc1e2
really translate risc - cpu/arm
...
also labels.
Actual translation/assembly is much cleaner
2018-03-25 19:38:59 +03:00
8cee2db1d1
return just gets the register (no more offset)
...
use mov instead
2018-03-24 18:32:53 +02:00
b4489b1093
rename RiscTransfer to Transfer
2018-03-21 15:48:04 +05:30
99ced4369a
adding Tue False and Nil Class to Parfait
...
and boot
2018-03-19 21:18:56 +05:30
f7aac1d1a4
polish docs
...
and a bit of code style
2018-03-11 16:11:15 +05:30
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
0397d4064d
fix all positioned uses as helper (not included anymore)
2017-01-01 21:52:55 +02:00
b094bcc64f
rename unit and sint to human readable forms
2016-12-31 18:45:22 +02:00
8aae8f7425
disabling failing test for now
...
have to add more test and code climate will show where
2016-12-29 21:24:11 +02:00
a3585870b9
remove unused code
2016-12-28 18:17:52 +02:00
4412eda105
small refactor and rename
2016-12-28 18:16:39 +02:00
a5946cb644
same renames for bytes (set/get_byte)
2016-12-25 18:11:58 +02:00
f648bf7bd5
rename also get_slot, to slot_to_reg
...
makes source and target clear
2016-12-25 18:05:39 +02:00
35adf9a5e6
rename set_slot
...
set_slot was clear about the target, but not the source.
Better with reg_to_slot (and soon it’s inverse slot_to_reg)
2016-12-25 18:02:39 +02:00
93ba5543b3
more renaming of frame
2016-12-21 18:51:22 +02:00
782627ae79
small rename
...
to avoid confusion with type.create_method
2016-12-17 00:21:12 +02:00
5cd05f6135
refactor memory instruction (needs better tests)
2016-12-16 15:40:52 +02:00
b2579a2b82
dead code removal
2016-12-16 01:31:38 +02:00
fd519314cb
strip down compare instruction
...
not really used, using conditional branches instead.
(in arm any instruction can execute conditionally)
2016-12-16 00:41:37 +02:00
94c423c2b3
whittling arm_translator
2016-12-15 18:21:08 +02:00
884bf23e5f
fix elf test
2016-12-15 17:57:45 +02:00
b93f207638
some common instruction extration
2016-12-15 12:38:22 +02:00
fdefb8e7a5
more refactoring on compare
2016-12-15 12:38:03 +02:00
ec2b0a563e
bunch of method extraction on instructions
2016-12-14 21:53:26 +02:00
55c108a8d7
refactor move_instruction a bit
2016-12-14 21:13:41 +02:00
