Commit Graph

1516 Commits

Author SHA1 Message Date
Torsten Ruger
6721153456 fix return sequence
logic error of swapping messages too soon
simplify by folding message unto itself
thus only need one extra register for the address
2018-03-23 18:58:42 +02:00
Torsten Ruger
a306c464b7 start using tmp registers at 1
which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
472b1a638a add register logging and fix function return
return semantics used to be different, now only register is given
2018-03-23 18:56:38 +02:00
Torsten Ruger
b4a18bc59b mostly brackets and formatting 2018-03-23 18:55:23 +02:00
Torsten Ruger
55832315eb more fix for multilevel constant load
was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
Torsten Ruger
34903829ca fix interpreter test harness and start testing
interpreter on debug for now
2018-03-22 18:54:40 +02:00
Torsten Ruger
e505856af7 fix multi level right slot load
was done for left, but forgotten for right
2018-03-22 18:54:07 +02:00
Torsten Ruger
6e901e1718 allow setting the source for slot loads
so we can track more exactly which instruction created the risc
2018-03-22 18:45:03 +02:00
Torsten Ruger
9932d0bf33 add source to the to_s 2018-03-22 18:38:19 +02:00
Torsten Ruger
19afc376f4 fix local name being string (not symbol) 2018-03-22 21:08:13 +05:30
Torsten Ruger
769fd71a3d fix redefining typed methods
as happens for predefined Space.main
2018-03-22 21:06:22 +05:30
Torsten Ruger
ca3bf6acfa fix constants being passed down 2018-03-22 02:38:06 +05:30
Torsten Ruger
01151b4ba7 make continue labels unique 2018-03-21 22:05:51 +05:30
Torsten Ruger
e0dd4e0ad7 test dynamic call
made cache labels unique
2018-03-21 21:58:43 +05:30
Torsten Ruger
f424e58715 finish the simple call
moving jump address
2018-03-21 19:29:00 +05:30
Torsten Ruger
49880267bb start to test call
as per tdd noticing logic errors, have to swap message out
2018-03-21 19:20:51 +05:30
Torsten Ruger
b5ef929c9c add method to risc function call
just so we still know at compile time
2018-03-21 19:05:53 +05:30
Torsten Ruger
a9196e9cd6 implement simple_calls to_risc 2018-03-21 18:54:42 +05:30
Torsten Ruger
fcbdba4804 simplify method entry exit codes
Basically just a label now
No more implicit returns (needs compiler tests)
Many return points is the new idea
Also setup is done before the enter by MessageSetup
2018-03-21 16:02:46 +05:30
Torsten Ruger
61a801b00c Return to_risc
remove the index from FunctionReturn, just jump to the register address
2018-03-21 15:48:50 +05:30
Torsten Ruger
b4489b1093 rename RiscTransfer to Transfer 2018-03-21 15:48:04 +05:30
Torsten Ruger
fa797f722d to_risc for NotSameCheck
which is only used in call cache checking
some fixing, needed to add a abel for the cache check jump
2018-03-21 12:38:28 +05:30
Torsten Ruger
12c71fa394 first go at message setups translation to risc
simplest possible implementation, ie the method and next_messages are
loaded many times.

But the layer design shines, it’s easy to understand
2018-03-21 12:20:55 +05:30
Torsten Ruger
b99fdc3425 rename jump label 2018-03-21 11:52:53 +05:30
Torsten Ruger
d98e55907e first go at translating DynamicCall to risc 2018-03-21 11:51:10 +05:30
Torsten Ruger
48485477c2 implement one more depth for slot_load
soon time to make some loop
fix offset with array / object layout difference
2018-03-20 23:31:20 +05:30
Torsten Ruger
8dc0950980 implement ArgumentTransfer
also unite with the receiver which was handled incorrectly
(left as a Vool constant)
2018-03-20 22:31:39 +05:30
Torsten Ruger
77084dc894 fix unconditional jump
and affected tests
2018-03-20 22:05:09 +05:30
Torsten Ruger
dba08ba8ce small code climate inspired clean 2018-03-20 13:48:17 +05:30
Torsten Ruger
2c6ea7ea46 finish truth check (green again)
some (basic) if tests
2018-03-20 13:30:38 +05:30
Torsten Ruger
8bac096f74 fix while statements each
wasn’t picking up condition
2018-03-20 13:29:18 +05:30
Torsten Ruger
c8980595a3 start to test if
truth check is only half done
2018-03-19 21:20:11 +05:30
Torsten Ruger
63c1468e1e bit of code docs 2018-03-19 21:19:46 +05:30
Torsten Ruger
cff6226297 own file for check 2018-03-19 21:19:26 +05:30
Torsten Ruger
99ced4369a adding Tue False and Nil Class to Parfait
and boot
2018-03-19 21:18:56 +05:30
Torsten Ruger
d195ef68da move the code to load a slot_definition to a register
so we don’t have to copy it.
2018-03-19 20:54:32 +05:30
Torsten Ruger
7953ef3e39 fix slot_load for higher order left arguments
needed for getting args or frame of the target, for assigns
fixed ripples in tests
2018-03-19 15:47:40 +05:30
Torsten Ruger
c0a7f1d284 fix insertion and add assign send
must implement send conversion before this makes sense
2018-03-19 13:19:42 +05:30
Torsten Ruger
66a160d8ab fix code insertion in method 2018-03-19 13:05:08 +05:30
Torsten Ruger
46ed4285a2 filing at dependencies 2018-03-18 22:36:36 +05:30
Torsten Ruger
af94d40cab passing frame (locals) into method creation
so typed_method have correct frame information and
can resolve slots correctly (next step)
2018-03-18 22:09:27 +05:30
Torsten Ruger
0813312ddc using compiler_for to create all building compilers
unify api, create defaults and especially pass the right types into the
typed method creation
2018-03-18 22:08:35 +05:30
Torsten Ruger
e7b878a353 mostly finish index resolve in slot_definition
alas, it reveals error, types may not be set correctly
2018-03-18 10:51:46 +05:30
Torsten Ruger
be79388cc5 remove dead code 2018-03-18 10:50:37 +05:30
Torsten Ruger
c5ec532616 use common list for risc instruction
strange that that was not done before as the code was clearly copied
when extracting it

Fix bug for insertion
2018-03-18 10:36:01 +05:30
Torsten Ruger
9c052c78a7 fix most of slot_load to_risc
higher orders not working yet
2018-03-17 21:32:09 +05:30
Torsten Ruger
cddc25a595 fixing tests for shifting constants into slots 2018-03-17 21:15:38 +05:30
Torsten Ruger
3fecdf54a5 always return slot definitions
fixing sends defs
2018-03-17 20:57:35 +05:30
Torsten Ruger
642f16b73a adding cache entry to parfait 2018-03-17 19:03:39 +05:30
Torsten Ruger
16c8fcbf66 first local assignment risc test
comes with casualties
slot_load needs more work
2018-03-17 11:13:44 +05:30