|
|
63323376e4
|
use more instances in parfait
and misc
|
2019-09-10 12:33:57 +03:00 |
|
Torsten Ruger
|
bbb7dbef75
|
First part of int allocation
implemented allocate_int
instead of add_new_int
|
2018-11-21 11:12:39 +02:00 |
|
Torsten Ruger
|
f5c284b3a0
|
bring the blocks down to mom level
reusing message_setup, but adding yield specific instructions
|
2018-07-24 11:35:49 +03:00 |
|
Torsten Ruger
|
e099014d63
|
fix dunamic jump in interpreter and misc
|
2018-07-03 19:15:36 +03:00 |
|
Torsten Ruger
|
046617f8dc
|
add branch listener functionaliy
have to store the branches and loop again as labels
dont neccessarily have positions yet
|
2018-06-17 22:25:38 +03:00 |
|
Torsten Ruger
|
3cc9175efa
|
start BranchListener
but on hold, since it needs positions before we have them
Must create them during collection phase
|
2018-06-14 21:29:34 +03:00 |
|
Torsten Ruger
|
6f0fad0957
|
dragging the extra through resets
as the binary the instruction is in may change when repositioning
|
2018-05-25 19:04:48 +03:00 |
|
Torsten Ruger
|
65d57c8c7c
|
removing unconditional
just Branch is fine
|
2018-04-02 19:30:34 +03:00 |
|
Torsten Ruger
|
b24b65520d
|
remove all that label stuff
left over after rewrite from blocks to linked list
|
2018-03-26 14:54:41 +03:00 |
|
Torsten Ruger
|
de7e02b0b8
|
remove IsSame branch from risc
mixing up levels, IsSame is Mom
at risc this is a minus and Zero check
fix all tests
|
2018-03-24 18:54:36 +02:00 |
|
Torsten Ruger
|
6a538624c5
|
remove NotSame from risc
instead use a - b and then isZero
|
2018-03-24 17:54:15 +02:00 |
|
Torsten Ruger
|
9932d0bf33
|
add source to the to_s
|
2018-03-22 18:38:19 +02:00 |
|
Torsten Ruger
|
fa797f722d
|
to_risc for NotSameCheck
which is only used in call cache checking
some fixing, needed to add a abel for the cache check jump
|
2018-03-21 12:38:28 +05:30 |
|
Torsten Ruger
|
d98e55907e
|
first go at translating DynamicCall to risc
|
2018-03-21 11:51:10 +05:30 |
|
Torsten Ruger
|
77084dc894
|
fix unconditional jump
and affected tests
|
2018-03-20 22:05:09 +05:30 |
|
Torsten Ruger
|
c8980595a3
|
start to test if
truth check is only half done
|
2018-03-19 21:20:11 +05:30 |
|
Torsten Ruger
|
aa79e41d1c
|
rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
|
2017-01-19 09:02:29 +02:00 |
|
