Commit Graph

385 Commits

Author SHA1 Message Date
61fc8a3991 make operator_instruction single ass
create result register automatically
usually not used, but register allocation will sort that
2020-03-22 14:31:43 +02:00
1378745907 first interpreter tests 2020-03-22 14:31:43 +02:00
c16ed5ab3a fix interpreter
by currently not checking for old register pattern
feels like wip, but passes (all but one)
2020-03-22 14:31:43 +02:00
407ca6ef72 misc test fixes 2020-03-22 14:31:43 +02:00
8abcaa330b fix allocate in builder
which accessed unknown types.
also moved assert_allocate to support
2020-03-22 14:31:43 +02:00
c9fedec230 add a way to bend the type for register_value
specifically for factories, where we know the type of next_object even it is not specified
2020-03-22 14:31:43 +02:00
6267bf3ad0 fix slot_to_reg to allow register indexes
we mostly use pre-calculated indexes, ie integers
but registers are allowed (in arm/risc), so we try to check the registers type at least is right.
The return is really a machine word, but we call it Object (yes, more work that way)
2020-03-22 14:31:43 +02:00
fb4fa598f2 fix get_internal_byte
improved operators and tests
some logic errors still
2020-03-22 14:31:43 +02:00
22d513d895 fix div4 and tests
also bug in reduce_int, compiler not carried through
2020-03-22 14:31:43 +02:00
eed9ba082f Fix div10 and test
fix and use load_data (similar to load_constant)
and integrate into load_object when appropriate (ie for integers)
2020-03-22 14:31:43 +02:00
bd02f69824 reduce_int was overwriting register
No more. But the type question is open, ie what type does the resulting register have
2020-03-22 14:31:43 +02:00
53eb28fff4 load constant to create register names with class
Just the id_ did give no clue to the contents, just took care of the uniqueness.
Better for debugging
2020-03-22 14:31:43 +02:00
9c5d17a3bb Fix div10 without method_missing
but reanimate infer_type to auto create the needed regsiters
also some helpers
2020-03-22 14:31:43 +02:00
9a5e0f15cd reannimate infer_type
now with a _purpose_
2020-03-22 14:31:43 +02:00
3688c967d3 Fix comparison macro
which leaves a definite need for instruction level testing
2020-03-22 14:31:43 +02:00
fd43fc9e5c finally fixes the builder 2020-03-22 14:31:43 +02:00
db5a59f735 Unify instruction namings also dirs
Was getting confused myself, where it was instruction or instructions, when if the base class was inside or out of dir.
Now dirs are plural, and base class is inside.
2020-03-22 14:31:43 +02:00
d0036ed95b better way to test object registers
also some cleaning, by using more helpers
2020-03-22 14:31:43 +02:00
ece1e8c87b fix some more of builder
but still not all. removed some and fixed the register allocation in allocate_int
2020-03-22 14:31:43 +02:00
ff49ff50c0 Convert SimpleCall to new regs
Also fix bug in RegsiterValue/Slot with chain, where logic was dodgy and compiler not set
2020-03-22 14:31:43 +02:00
4888b3b6db Starting to rework slot instructions that create risc
have to go through all and all macros and all thems tests. What did the wise man say: one step at a time
2020-03-22 14:31:43 +02:00
4643be0ae6 codong RegisterSlot with reg and slot 2020-03-22 14:31:43 +02:00
64d860b2bf create a load on the compiler
thus removing the need for << with objects on RegisterValue
2020-03-22 14:31:43 +02:00
95f3eec043 repurpose RValue as RegisterSlot
with the idea of the better name came also the one about not needing the builder anymore
2020-03-22 14:31:43 +02:00
d22da1ab97 SA for slot_to_reg 2020-03-22 14:31:43 +02:00
77003eed06 remove use_reg on compiler and SA for load 2020-03-22 14:31:43 +02:00
0ce14bdfd1 moving to SA register names (wip)
starting to implement register allocation by first creating SA
Single Assignment means a register is only every assigned a value once. Hence for any operation involving another register, a new register is created.
We do this with a naming scheme for the registers in dot notation (as it would be in c) which means 2 registers with the same name, should have the same contents. This does not apply to temporaries, but that is another day.
Starting WIP now, and will create many red commits before merging when green.
2020-03-22 14:31:43 +02:00
887d7b9bbb replace fake compiler with real
less room for error
2020-02-28 12:54:17 +02:00
685022a6e0 Externalise register allocation into own class
On the way to the register allocation
2020-02-27 11:57:18 +02:00
8832df3221 Add number of registers to platform 2020-02-26 19:01:01 +02:00
aa9fc8bc81 More rename cleanp 2019-10-03 21:07:55 +03:00
c43436f35a Change Mom to SlotMachine
rather large commit, but essentially a simple rename
Rationale in docs and blogs
2019-10-03 20:55:41 +03:00
2dcb2a9a72 Introduce singleton types
Just for future, as this gives us a way to know immediately in the type, which represent normal, and which singleton classes
Also instantiate singleton class lazily (with singleton type)
This makes the type of class single, ie unique, immediately when it is used, ie methods or variables defined.
Fixes a design mistake, where all singletonn classes shared the same type, and thus unique methods per class were impossible
(Also some misc in commit)
2019-10-01 19:42:16 +03:00
dcbc3e17be refactor risc_collection
move code that operates on compiler to the compiler class
this leaves the collection thin, very thin indeed
2019-09-28 15:37:02 +03:00
2eb9364283 make mom:method_compiler a list
Compilers forms alist by Util::CompilerList
Change Collection to use the list instead of array
2019-09-28 12:41:38 +03:00
1022390e0f check for redefining of methods and forbid
causing some test problems, but better that way (until it's done right off course)
2019-09-24 21:20:12 +03:00
3df54910cc rename singleton_class to single_class and misc
was clashing with real ruby method name
also many superclass mismatch fixes
some misc
2019-09-24 17:25:19 +03:00
dd810cfc49 Make to_mom a 2 stage process
First baby baby step on the way to passes
Create all parfait objects in first pass, so methods exist to be resolved in second path
2019-09-24 15:44:33 +03:00
a446d3da6b rename meta to singleton class
seems more appropriate, as it is the class for a single object
Also seems to be called that on the net (don't remember where the meta came from, but it's gone)
2019-09-24 12:59:22 +03:00
66728f09f4 Fix meta_class, sis class instance variables and class methods
after some serious recursive thinking it now actually makes sense.
The key was to change the actual type of the class that the meta_class manages
For objects it's (still) ok just to change the instance_type, but since the class object exists and has type, when adding instance variables, that actual type has to change
2019-09-24 12:59:22 +03:00
7b40bb9106 Fixing new parfait boot process
mostly about setting the types to existing objects. 
Then after space is in place, it is set automatically

also a fair bit of misc in the commit
2019-09-23 00:07:30 +03:00
a496ea7e4b Derive Class and MetaClass from Behaviour
Finally! If i remember the module was from before i had any non Object superclasses
unified code, unified bugs :-) just makes sense
2019-09-21 18:50:33 +03:00
1e2c4d6678 More tests and compiling parfait object 2019-09-19 17:41:26 +03:00
b0d1948800 Moving space to object class
away from Parfait module, as that gets collapsed
Leaving shortcut outside parfait for now
2019-09-18 22:36:56 +03:00
f13e8b3bd7 A little work on test times
They have been rising of late, installer reporter to check 8and keep checking)
tweaking of cli parameters 
removed redundant interpreter tests
2019-09-18 13:36:29 +03:00
e56db0a3ac get method name out from method_missing 2019-09-17 20:18:00 +03:00
d58ed8e5e8 remove dead code that was produced 2019-09-17 16:08:49 +03:00
5ab021de5a Continue testing mom instructions
especially with the custom asserts, gadda say
mesa lika disa
2019-09-15 18:31:10 +03:00
d913bb01de use method missing in resolve method
not just exit
try to print name next
2019-09-15 15:13:11 +03:00
7ee57f2b08 generalize get_main and get_init to get_method
to get at those know methods that really
__must__ exists, hence the bang, raise if don't
about to add method missing and raise to the list
2019-09-15 12:58:43 +03:00