Commit Graph

104 Commits

Author SHA1 Message Date
Torsten Ruger
59e6298879 first resolved call running though
and returning an int, as it should
just the value .  .  .
2018-04-08 23:45:23 +03:00
Torsten Ruger
fabe4db4f6 fix logic error in vool dynamic send
using receiver of current method
instead of receiver of next message
2018-04-08 22:59:42 +03:00
Torsten Ruger
580c53cdae fix the resolve
without return and not being a function
2018-04-08 22:30:18 +03:00
Torsten Ruger
33ffcf1d88 move resolve_method code from word to mom
rather make resolve an instruction.
Since it was coded in risc anyway, we not only save the setup and call
But also makes the mom instruction flow clearer
The method really came from not wanting to code it in risc, but with
the Builder, that is now surprisingly painless
2018-04-08 18:55:17 +03:00
Torsten Ruger
9867234c38 move most code from method_compiler to builder
rather use builder in two ways, than sometimes compiler and sometimes
builder
Also makes it possible to reuse builtin code in mom’s to_risc, as both
use builder. The builtin code by directly adding to compiler, the mom
code not.
2018-04-08 18:51:20 +03:00
Torsten Ruger
6958fc31ab rework resolve_method, using builder 2018-04-07 23:07:44 +03:00
Torsten Ruger
26cf911a5c change build names a little and document 2018-04-07 22:35:40 +03:00
Torsten Ruger
db55ec3fd6 slightly changing built return logic
very tempted to add immediately, but bigger change
2018-04-07 00:35:54 +03:00
Torsten Ruger
dd0d162ebf fix the init also, was using first message twice
not advancing after first load
2018-04-07 00:14:02 +03:00
Torsten Ruger
eea92399ee concludes static message setup 2018-04-06 23:11:08 +03:00
Torsten Ruger
1ddbde1191 return single message for "message" ie r0
other names, like next_message allocate  a new register
2018-04-06 22:54:54 +03:00
Torsten Ruger
22409c93ee remove >>, consistent use of <<
makes code easier to read, like assignments
does remind of Passengers
2018-04-06 22:40:58 +03:00
Torsten Ruger
c042dd9faa allow reverse syntax for >> (ie <<)
slot >> reg makes sense, being a slot_to_reg
but . . .
consistently use of << (as meaning assignment , =) also makes sense
allow both and let time tell which makes more sense
2018-04-06 21:05:26 +03:00
Torsten Ruger
41d573d571 wrought one more instruction for message setup
now with dsl ready, should be faster
2018-04-06 20:58:58 +03:00
Torsten Ruger
cae5e323ec add reg to slot 2018-04-06 20:21:14 +03:00
Torsten Ruger
c233bd82d6 implement [] for RiscValue for the dsl 2018-04-06 16:08:35 +03:00
Torsten Ruger
e396807ee5 start work on dsl
so i can read my own code
2018-04-06 14:21:38 +03:00
Torsten Ruger
d52e14d201 continue to rewrite message_setup
message come from space already.
next types
2018-04-05 20:37:03 +03:00
Torsten Ruger
f09086e524 unite the two resolve_to_index functions 2018-04-05 20:10:00 +03:00
Torsten Ruger
f4ce6d6253 starting to redo message_setup
apart from previous commits bug, it also needs to deal with
dynamic/static correctly
and while at it will do the getting from space
2018-04-05 12:24:49 +03:00
Torsten Ruger
ee0a1ca823 renaming methods args and frame
to arguments_type and frame_type, because that is what they are
In honour of setup bug, where the types of those types were loaded,
instead of just them types
2018-04-05 12:22:14 +03:00
Torsten Ruger
c51fc67ba5 make interpreter tests less brittle
by factoring __init code away
just counting main
2018-04-04 20:05:09 +03:00
Torsten Ruger
65d57c8c7c removing unconditional
just Branch is fine
2018-04-02 19:30:34 +03:00
Torsten Ruger
a2173645b3 remove the :int shorthand 2018-03-31 19:17:55 +03:00
Torsten Ruger
cb9f6973d9 fix true false and nil constant
going from mom to parfait
basics in place, more ripples to fix
2018-03-31 13:47:02 +03:00
Torsten Ruger
9e9b5c7f37 move to parfait integers in risc layer
loading constants means loading parfait objects
objects have to me collected in machine
integer ok, string/true/false/nil next
2018-03-31 13:25:59 +03:00
Torsten Ruger
4cc1d8455e fix util namespace
and instruction move ripples
2018-03-26 20:05:30 +03:00
Torsten Ruger
bc4d4b428a change boot to new hash syntax 2018-03-25 13:27:15 +03:00
Torsten Ruger
de7e02b0b8 remove IsSame branch from risc
mixing up levels, IsSame is Mom
at risc this is a minus and Zero check
fix all tests
2018-03-24 18:54:36 +02:00
Torsten Ruger
ad3e73d931 start on dynamic call test
fix cache entry being not loaded
test incomplete because of missing resolve_method
2018-03-24 17:55:01 +02:00
Torsten Ruger
6a538624c5 remove NotSame from risc
instead use a - b and then  isZero
2018-03-24 17:54:15 +02:00
Torsten Ruger
0f183b3a74 fix value return and test
slot load was wrong way around
2018-03-23 20:02:17 +02:00
Torsten Ruger
6721153456 fix return sequence
logic error of swapping messages too soon
simplify by folding message unto itself
thus only need one extra register for the address
2018-03-23 18:58:42 +02:00
Torsten Ruger
a306c464b7 start using tmp registers at 1
which used to be reserved for the next message
2018-03-23 18:57:16 +02:00
Torsten Ruger
55832315eb more fix for multilevel constant load
was ignoring first level which is already the second for a constant
as the constant is the first load.
first interpreter test working but looking dodgy
2018-03-22 19:14:22 +02:00
Torsten Ruger
e505856af7 fix multi level right slot load
was done for left, but forgotten for right
2018-03-22 18:54:07 +02:00
Torsten Ruger
6e901e1718 allow setting the source for slot loads
so we can track more exactly which instruction created the risc
2018-03-22 18:45:03 +02:00
Torsten Ruger
ca3bf6acfa fix constants being passed down 2018-03-22 02:38:06 +05:30
Torsten Ruger
01151b4ba7 make continue labels unique 2018-03-21 22:05:51 +05:30
Torsten Ruger
f424e58715 finish the simple call
moving jump address
2018-03-21 19:29:00 +05:30
Torsten Ruger
49880267bb start to test call
as per tdd noticing logic errors, have to swap message out
2018-03-21 19:20:51 +05:30
Torsten Ruger
b5ef929c9c add method to risc function call
just so we still know at compile time
2018-03-21 19:05:53 +05:30
Torsten Ruger
a9196e9cd6 implement simple_calls to_risc 2018-03-21 18:54:42 +05:30
Torsten Ruger
61a801b00c Return to_risc
remove the index from FunctionReturn, just jump to the register address
2018-03-21 15:48:50 +05:30
Torsten Ruger
fa797f722d to_risc for NotSameCheck
which is only used in call cache checking
some fixing, needed to add a abel for the cache check jump
2018-03-21 12:38:28 +05:30
Torsten Ruger
12c71fa394 first go at message setups translation to risc
simplest possible implementation, ie the method and next_messages are
loaded many times.

But the layer design shines, it’s easy to understand
2018-03-21 12:20:55 +05:30
Torsten Ruger
b99fdc3425 rename jump label 2018-03-21 11:52:53 +05:30
Torsten Ruger
d98e55907e first go at translating DynamicCall to risc 2018-03-21 11:51:10 +05:30
Torsten Ruger
48485477c2 implement one more depth for slot_load
soon time to make some loop
fix offset with array / object layout difference
2018-03-20 23:31:20 +05:30
Torsten Ruger
8dc0950980 implement ArgumentTransfer
also unite with the receiver which was handled incorrectly
(left as a Vool constant)
2018-03-20 22:31:39 +05:30