606e3f8cb3
fix calling to binaries
...
used to be to the method, but we assemble the method to its own
position.
Throw in a test for binary calling
2018-03-28 13:00:03 +03:00
7493d738e1
have to translate the labels
...
and use binary as function call target
(because we don’t have the translated label)
2018-03-28 12:50:07 +03:00
2e57674008
remove io.write_unsigned_8
...
and replace with write_unsigned_32, so that is the only used
method from the stream
Next up, replace the actual “stream” with a binary code writer
2018-03-27 19:37:52 +03:00
c5b3c3f106
give arm own instruction base class back
2018-03-26 20:04:39 +03:00
294f4d988f
automatically create binary once cpu instructions are there
2018-03-26 19:42:15 +03:00
279fdcc1e2
really translate risc - cpu/arm
...
also labels.
Actual translation/assembly is much cleaner
2018-03-25 19:38:59 +03:00
8cee2db1d1
return just gets the register (no more offset)
...
use mov instead
2018-03-24 18:32:53 +02:00
b4489b1093
rename RiscTransfer to Transfer
2018-03-21 15:48:04 +05:30
99ced4369a
adding Tue False and Nil Class to Parfait
...
and boot
2018-03-19 21:18:56 +05:30
f7aac1d1a4
polish docs
...
and a bit of code style
2018-03-11 16:11:15 +05:30
aa79e41d1c
rename register to risc
...
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
0397d4064d
fix all positioned uses as helper (not included anymore)
2017-01-01 21:52:55 +02:00
b094bcc64f
rename unit and sint to human readable forms
2016-12-31 18:45:22 +02:00
8aae8f7425
disabling failing test for now
...
have to add more test and code climate will show where
2016-12-29 21:24:11 +02:00
a3585870b9
remove unused code
2016-12-28 18:17:52 +02:00
4412eda105
small refactor and rename
2016-12-28 18:16:39 +02:00
a5946cb644
same renames for bytes (set/get_byte)
2016-12-25 18:11:58 +02:00
f648bf7bd5
rename also get_slot, to slot_to_reg
...
makes source and target clear
2016-12-25 18:05:39 +02:00
35adf9a5e6
rename set_slot
...
set_slot was clear about the target, but not the source.
Better with reg_to_slot (and soon it’s inverse slot_to_reg)
2016-12-25 18:02:39 +02:00
93ba5543b3
more renaming of frame
2016-12-21 18:51:22 +02:00
782627ae79
small rename
...
to avoid confusion with type.create_method
2016-12-17 00:21:12 +02:00
5cd05f6135
refactor memory instruction (needs better tests)
2016-12-16 15:40:52 +02:00
b2579a2b82
dead code removal
2016-12-16 01:31:38 +02:00
fd519314cb
strip down compare instruction
...
not really used, using conditional branches instead.
(in arm any instruction can execute conditionally)
2016-12-16 00:41:37 +02:00
94c423c2b3
whittling arm_translator
2016-12-15 18:21:08 +02:00
884bf23e5f
fix elf test
2016-12-15 17:57:45 +02:00
b93f207638
some common instruction extration
2016-12-15 12:38:22 +02:00
fdefb8e7a5
more refactoring on compare
2016-12-15 12:38:03 +02:00
ec2b0a563e
bunch of method extraction on instructions
2016-12-14 21:53:26 +02:00
55c108a8d7
refactor move_instruction a bit
2016-12-14 21:13:41 +02:00
b3eeb7db21
memory instruction refactor (small)
2016-12-14 21:05:24 +02:00
6eea3f2b2a
refactor logic instruction
2016-12-14 20:31:37 +02:00
c1d23a8d48
whitespace round plusses
2016-12-14 19:57:09 +02:00
27e7a362db
comment unused code
2016-12-14 19:52:08 +02:00
56bf875f36
refactor call_instruction
2016-12-14 19:07:03 +02:00
bf4ddd16ee
remove dead code
2016-12-14 19:06:48 +02:00
456e9b1ec0
folded salama-arm in
2016-12-14 13:43:13 +02:00
a8453c126d
use arm shift at runtime
...
arm indexes are in bytes (x4) at compile time
but at runtime we only have the array indexes, iw word indexes
arm has the nice barrel shifter to save us an extra instruction
2015-11-19 12:48:13 +02:00
249f43ad34
translate and interpret new instructions
2015-11-19 10:09:55 +02:00
303b7eb1f8
putstring unfolds length
...
which means sys call doesn’t need to
and also interpreter sometimes gets a symbol length
2015-11-16 18:03:29 +02:00
f50d7b57a4
fix the putstring sys call indexing
...
index 0 is the marker word , so like in some, all indexes 1 based
works :-)
2015-11-15 22:03:06 +02:00
8e82da0b61
fix arm (assembled) indexing
...
by having a dummy 0 index in salaam. when assembled
2015-11-15 20:42:07 +02:00
458610b970
implement string length
2015-11-15 11:28:16 +02:00
b30cf21bbd
fix arm indexes
...
needs rethought
fixed for static use, but what about dynamic
2015-11-15 00:35:12 +02:00
6127d92ca9
implement arm branches
...
which backfired into interpreter as
plus actually means 0 or plus in arm
may still change back but for now
2015-11-14 00:20:03 +02:00
6f0d6d831e
update arm and implement most operators
...
multiplication wasn’t implemented
and division isn’t part if arm
neither is rotate by register
2015-11-12 20:02:14 +02:00
c38775e933
add set_internal
...
and the set_slot with register
very much like the get_slot for get_internal
2015-11-08 17:10:36 +02:00
484e2d19d4
allow for registers in get slot
2015-11-07 19:38:03 +02:00
c15445a958
let labels be constants
2015-11-03 16:20:25 +02:00
3774f8a5a2
use translator and remove passes
...
the only passes that were left were reg -> arm
those are almost completely one to one, so the idea of passes didn’t fit
2015-10-24 17:11:18 +03:00
