Commit Graph

205 Commits

Author SHA1 Message Date
Torsten Ruger
b4489b1093 rename RiscTransfer to Transfer 2018-03-21 15:48:04 +05:30
Torsten Ruger
99ced4369a adding Tue False and Nil Class to Parfait
and boot
2018-03-19 21:18:56 +05:30
Torsten Ruger
f7aac1d1a4 polish docs
and a bit of code style
2018-03-11 16:11:15 +05:30
Torsten Ruger
aa79e41d1c rename register to risc
seems to fit the layer much better as we really have a very reduced
instruction set
2017-01-19 09:02:29 +02:00
Torsten Ruger
0397d4064d fix all positioned uses as helper (not included anymore) 2017-01-01 21:52:55 +02:00
Torsten Ruger
b094bcc64f rename unit and sint to human readable forms 2016-12-31 18:45:22 +02:00
Torsten Ruger
8aae8f7425 disabling failing test for now
have to add more test and code climate will show where
2016-12-29 21:24:11 +02:00
Torsten Ruger
a3585870b9 remove unused code 2016-12-28 18:17:52 +02:00
Torsten Ruger
4412eda105 small refactor and rename 2016-12-28 18:16:39 +02:00
Torsten Ruger
a5946cb644 same renames for bytes (set/get_byte) 2016-12-25 18:11:58 +02:00
Torsten Ruger
f648bf7bd5 rename also get_slot, to slot_to_reg
makes source and target clear
2016-12-25 18:05:39 +02:00
Torsten Ruger
35adf9a5e6 rename set_slot
set_slot was clear about the target, but not the source.
Better with reg_to_slot (and soon it’s inverse slot_to_reg)
2016-12-25 18:02:39 +02:00
Torsten Ruger
93ba5543b3 more renaming of frame 2016-12-21 18:51:22 +02:00
Torsten Ruger
782627ae79 small rename
to avoid confusion with type.create_method
2016-12-17 00:21:12 +02:00
Torsten Ruger
5cd05f6135 refactor memory instruction (needs better tests) 2016-12-16 15:40:52 +02:00
Torsten Ruger
b2579a2b82 dead code removal 2016-12-16 01:31:38 +02:00
Torsten Ruger
fd519314cb strip down compare instruction
not really used, using conditional branches instead.
(in arm any instruction can execute conditionally)
2016-12-16 00:41:37 +02:00
Torsten Ruger
94c423c2b3 whittling arm_translator 2016-12-15 18:21:08 +02:00
Torsten Ruger
884bf23e5f fix elf test 2016-12-15 17:57:45 +02:00
Torsten Ruger
b93f207638 some common instruction extration 2016-12-15 12:38:22 +02:00
Torsten Ruger
fdefb8e7a5 more refactoring on compare 2016-12-15 12:38:03 +02:00
Torsten Ruger
ec2b0a563e bunch of method extraction on instructions 2016-12-14 21:53:26 +02:00
Torsten Ruger
55c108a8d7 refactor move_instruction a bit 2016-12-14 21:13:41 +02:00
Torsten Ruger
b3eeb7db21 memory instruction refactor (small) 2016-12-14 21:05:24 +02:00
Torsten Ruger
6eea3f2b2a refactor logic instruction 2016-12-14 20:31:37 +02:00
Torsten Ruger
c1d23a8d48 whitespace round plusses 2016-12-14 19:57:09 +02:00
Torsten Ruger
27e7a362db comment unused code 2016-12-14 19:52:08 +02:00
Torsten Ruger
56bf875f36 refactor call_instruction 2016-12-14 19:07:03 +02:00
Torsten Ruger
bf4ddd16ee remove dead code 2016-12-14 19:06:48 +02:00
Torsten Ruger
456e9b1ec0 folded salama-arm in 2016-12-14 13:43:13 +02:00
Torsten Ruger
a8453c126d use arm shift at runtime
arm indexes are in bytes (x4) at compile time
but at runtime we only have the array indexes, iw word indexes
arm has the nice barrel shifter to save us an extra instruction
2015-11-19 12:48:13 +02:00
Torsten Ruger
249f43ad34 translate and interpret new instructions 2015-11-19 10:09:55 +02:00
Torsten Ruger
303b7eb1f8 putstring unfolds length
which means sys call doesn’t need to
and also interpreter sometimes gets a symbol length
2015-11-16 18:03:29 +02:00
Torsten Ruger
f50d7b57a4 fix the putstring sys call indexing
index 0 is the marker word , so like in some, all indexes 1 based
works :-)
2015-11-15 22:03:06 +02:00
Torsten Ruger
8e82da0b61 fix arm (assembled) indexing
by having a dummy 0 index in salaam. when assembled
2015-11-15 20:42:07 +02:00
Torsten Ruger
458610b970 implement string length 2015-11-15 11:28:16 +02:00
Torsten Ruger
b30cf21bbd fix arm indexes
needs rethought
fixed for static use, but what about dynamic
2015-11-15 00:35:12 +02:00
Torsten Ruger
6127d92ca9 implement arm branches
which backfired into interpreter as
plus actually means 0 or plus in arm
may still change back but for now
2015-11-14 00:20:03 +02:00
Torsten Ruger
6f0d6d831e update arm and implement most operators
multiplication wasn’t implemented
and division isn’t part if arm
neither is rotate by register
2015-11-12 20:02:14 +02:00
Torsten Ruger
c38775e933 add set_internal
and the set_slot with register
very much like the get_slot for get_internal
2015-11-08 17:10:36 +02:00
Torsten Ruger
484e2d19d4 allow for registers in get slot 2015-11-07 19:38:03 +02:00
Torsten Ruger
c15445a958 let labels be constants 2015-11-03 16:20:25 +02:00
Torsten Ruger
3774f8a5a2 use translator and remove passes
the only passes that were left were reg -> arm
those are almost completely one to one, so the idea of passes didn’t fit
2015-10-24 17:11:18 +03:00
Torsten Ruger
a871f96630 remove passes and achieve the same by translating 2015-10-24 11:42:36 +03:00
Torsten Ruger
f4f703975b removed arm and use as gem 2015-07-18 14:12:20 +03:00
Torsten Ruger
e1c19dee80 remove old to_asm
very strange that is was called in 1.9 but not 2.0
2.0 seems to delay interpolating strings
2015-07-18 12:15:07 +03:00
Torsten Ruger
f5136b6b68 minor formatting 2015-07-18 11:52:30 +03:00
Torsten Ruger
50da6a40f2 Move the Main instruction from register to virtual
also needs a branch in register.
This way the register level is self sufficient
(noticed while writing debugger)
2015-07-17 13:21:57 +03:00
Torsten Ruger
b670e058a9 fixes to get opal to work
opal has bug with << and |=, but changing syntax works
2015-07-12 10:01:45 +03:00
Torsten Ruger
b61c73acdd renamed info to MethodSource 2015-07-03 20:13:03 +03:00