fix message_setup with new builder

This commit is contained in:
Torsten 2020-03-02 17:50:49 +02:00
parent d0036ed95b
commit f3d299208e
5 changed files with 20 additions and 31 deletions

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@ -27,7 +27,7 @@ module Risc
when RegisterValue when RegisterValue
to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg) to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
when RegisterSlot when RegisterSlot
reg = to_reg("reduce #{@register.symbol}[@index]") reg = to_reg()
to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg) to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
else else
raise "not reg value or slot #{reg}" raise "not reg value or slot #{reg}"
@ -41,7 +41,7 @@ module Risc
# message[:caller] returns a RegisterSlot, which would be self for this example # message[:caller] returns a RegisterSlot, which would be self for this example
# to evaluate self[:next_message] we reduce self to a register with to_reg # to evaluate self[:next_message] we reduce self to a register with to_reg
def []( index ) def []( index )
reg = to_reg("reduce #{@register.symbol}[@index]") reg = to_reg()
reg[index] reg[index]
end end
@ -58,7 +58,8 @@ module Risc
# load the conntent of the slot that self descibes into a a new register. # load the conntent of the slot that self descibes into a a new register.
# the register is created, and the slot_to_reg instruction added to the # the register is created, and the slot_to_reg instruction added to the
# compiler. the return is a bit like @register[@index] # compiler. the return is a bit like @register[@index]
def to_reg( source ) def to_reg()
source = "reduce #{@register.symbol}[@index]"
slot_to_reg = Risc.slot_to_reg(source , register, index) slot_to_reg = Risc.slot_to_reg(source , register, index)
if compiler if compiler
compiler.add_code(slot_to_reg) compiler.add_code(slot_to_reg)

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@ -171,6 +171,7 @@ module Risc
# create operator instruction for self and add # create operator instruction for self and add
# doesn't read quite as smoothly as one would like, but better than the compiler version # doesn't read quite as smoothly as one would like, but better than the compiler version
def op( operator , right) def op( operator , right)
right = right.to_reg() if(right.is_a?(RegisterSlot))
ret = Risc.op( "operator #{operator}" , operator , self , right) ret = Risc.op( "operator #{operator}" , operator , self , right)
compiler.add_code(ret) if compiler compiler.add_code(ret) if compiler
ret ret

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@ -37,20 +37,15 @@ module SlotMachine
def build_with(builder) def build_with(builder)
case from = method_source case from = method_source
when Parfait::CallableMethod when Parfait::CallableMethod
builder.build { callable! << from } callable = builder.load_object(from)
when Parfait::CacheEntry when Parfait::CacheEntry
builder.build do callable = builder.load_object(from)[:cached_method].to_reg
cache_entry! << from
callable! << cache_entry[:cached_method]
end
when Integer when Integer
builder.build do callable = builder.message[ "arg#{from}".to_sym ].to_reg
callable! << message[ "arg#{from}".to_sym ]
end
else else
raise "unknown source #{method_source.class}:#{method_source}" raise "unknown source #{method_source.class}:#{method_source}"
end end
build_message_data(builder) build_message_data(builder , callable)
return builder.built return builder.built
end end
@ -60,14 +55,8 @@ module SlotMachine
end end
# set the method into the message # set the method into the message
def build_message_data( builder ) def build_message_data( builder , callable)
if(reg = builder.names["next_message"]) builder.message[:next_message][:method] << callable
raise "NEXT = #{reg}"
end
builder.build do
next_message! << message[:next_message]
next_message[:method] << callable
end
end end
end end
end end

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@ -9,13 +9,13 @@ module SlotMachine
assert_equal 4 , all.length , all_str assert_equal 4 , all.length , all_str
end end
def test_1_slot def test_1_slot
assert_slot_to_reg risc(1) ,:r0 , 9 , :r1 assert_slot_to_reg risc(1) ,:message , 9 , :"message.arg1"
end end
def test_2_slot def test_2_slot
assert_slot_to_reg risc(2) ,:r0 , 1 , :r2 assert_slot_to_reg risc(2) ,:message , 1 , :"message.next_message"
end end
def test_3_reg def test_3_reg
assert_reg_to_slot risc(3) , :r1 , :r2 , 7 assert_reg_to_slot risc(3) , :"message.arg1" , :"message.next_message" , 7
end end
end end
class TestMessageSetupCache < SlotMachineInstructionTest class TestMessageSetupCache < SlotMachineInstructionTest
@ -30,16 +30,16 @@ module SlotMachine
assert_equal 5 , all.length , all_str assert_equal 5 , all.length , all_str
end end
def test_1_load def test_1_load
assert_load risc(1) , Parfait::CacheEntry , :r1 assert_load risc(1) , Parfait::CacheEntry , "id_"
end end
def test_2_slot def test_2_slot
assert_slot_to_reg risc(2) ,:r1 , 2 , :r2 assert_slot_to_reg risc(2) ,"id_" , 2 , "id_.cached_method"
end end
def test_3_slot def test_3_slot
assert_slot_to_reg risc(3) ,:r0 , 1 , :r3 assert_slot_to_reg risc(3) ,:message , 1 , :"message.next_message"
end end
def test_4_reg def test_4_reg
assert_reg_to_slot risc(4) , :r2 , :r3 , 7 assert_reg_to_slot risc(4) , "id_.cached_method" , :"message.next_message" , 7
end end
end end

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@ -11,16 +11,14 @@ module SlotMachine
assert_equal 7 , all.length , all_str assert_equal 7 , all.length , all_str
end end
def test_1_load_return_label def test_1_load_return_label
assert_load risc(1) , Risc::Label assert_load risc(1) , Risc::Label , "id_"
assert_label risc(1).constant , "continue_" assert_label risc(1).constant , "continue_"
end end
def test_2_load_next_message def test_2_load_next_message
assert_slot_to_reg risc(2) ,:message , 1 , :"message.next_message" assert_slot_to_reg risc(2) ,:message , 1 , :"message.next_message"
end end
def test_3_store_return_address def test_3_store_return_address
assert risc(3).register.is_object? assert_reg_to_slot risc(3) , "id_" , :"message.next_message" , 4
assert_equal 4, risc(3).index
assert_equal :"message.next_message", risc(3).array.symbol
end end
def test_4_swap_messages def test_4_swap_messages
assert_slot_to_reg risc(4) ,:message , 1 , :message assert_slot_to_reg risc(4) ,:message , 1 , :message