rename left to first in instruction and started on logic instruction cleanup

lib/arm/arm_machine.rb

@@ -10,29 +10,29 @@ require_relative "constants"
 module Arm
   class ArmMachine < Vm::CMachine
 
-    def integer_less_or_equal block ,  left , right
+    def integer_less_or_equal block ,  first , right
-      block.add_code cmp( left , right: right )
+      block.add_code cmp( first , right: right )
       Vm::Bool.new
     end
 
-    def integer_plus block , result , left , right
+    def integer_plus block , result , first , right
-      block.add_code add( result , right: left , :extra => right )
+      block.add_code add( result , right: first , :extra => right )
       result
     end
 
-    def integer_minus block , result , left , right
+    def integer_minus block , result , first , right
-      block.add_code sub( result , right: left , :extra => right )
+      block.add_code sub( result , right: first , :extra => right )
       result
     end
 
-    def integer_load block , left , right
+    def integer_load block , first , right
-      block.add_code mov(  left , right: right )
+      block.add_code mov(  first , right: right )
-      left 
+      first 
     end
 
-    def integer_move block , left , right
+    def integer_move block , first , right
-      block.add_code mov(  left , right: right )
+      block.add_code mov(  first , right: right )
-      left 
+      first 
     end
 
     def string_load block ,  str_lit , reg
@@ -111,16 +111,17 @@ module Arm
       # returns quotient in r1, remainder in r2
       #          SUB    r2, r1, #10                       # keep (x-10) for later
       block.add_code sub( remainder , right: number , :extra => 10 )
-#          SUB    r1, r1, r1, lsr #2
+      #          SUB    r1, r1, r1, lsr #2
-#          ADD    r1, r1, r1, lsr #4
+      block.add_code add( number , right: number , extra: number ,  shift_right: 4)
-#          ADD    r1, r1, r1, lsr #8
+      #          ADD    r1, r1, r1, lsr #4
-#          ADD    r1, r1, r1, lsr #16
+      #          ADD    r1, r1, r1, lsr #8
-#          MOV    r1, r1, lsr #3
+      #          ADD    r1, r1, r1, lsr #16
-#          ADD    r3, r1, r1, asl #2
+      #          MOV    r1, r1, lsr #3
-#          SUBS   r2, r2, r3, asl #1                # calc (x-10) - (x/10)*10
+      #          ADD    r3, r1, r1, asl #2
-#          ADDPL  r1, r1, #1                        # fix-up quotient
+      #          SUBS   r2, r2, r3, asl #1                # calc (x-10) - (x/10)*10
-#          ADDMI  r2, r2, #10                       # fix-up remainder
+      #          ADDPL  r1, r1, #1                        # fix-up quotient
-#          MOV    pc, lr     
+      #          ADDMI  r2, r2, #10                       # fix-up remainder
+      #          MOV    pc, lr     
     end
 
     def syscall block , num

lib/arm/call_instruction.rb

@@ -20,8 +20,8 @@ module Arm
       4
     end
 
-    def initialize(left, attributes)
+    def initialize(first, attributes)
-      super(left , attributes)
+      super(first , attributes)
       @attributes[:update_status_flag] = 0
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
     end
@@ -29,7 +29,7 @@ module Arm
     def assemble(io)
       case @attributes[:opcode]
       when :b, :call
-        arg = @left
+        arg = @first
         #puts "BLAB #{arg.inspect}"
         if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
           arg = Vm::IntegerConstant.new( arg )
@@ -49,7 +49,7 @@ module Arm
         end
         io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
       when :swi
-        arg = @left
+        arg = @first
         if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
           arg = Vm::IntegerConstant.new( arg )
         end

lib/arm/compare_instruction.rb

@@ -5,13 +5,13 @@ module Arm
     include Arm::Constants
     include LogicHelper
 
-    def initialize(left , attributes)
+    def initialize(first , attributes)
-      super(left , attributes) 
+      super(first , attributes) 
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
       @operand = 0
       @i = 0      
       @attributes[:update_status_flag] = 1
-      @rn = left
+      @rn = first
       @rd = :r0
     end
     def build 

lib/arm/logic_instruction.rb

@@ -4,23 +4,102 @@ module Arm
 
   class LogicInstruction < Vm::LogicInstruction
     include Arm::Constants
-    include LogicHelper
 
-    def initialize(left , attributes)
+    def initialize(first , attributes)
-      super(left , attributes)
+      super(first , attributes)
       @attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
       @operand = 0
 
       @rn = nil
       @i = 0      
-      @rd = @left
     end
-    attr_accessor :i, :rn, :rd
+    attr_accessor :i, :rn
+    
     # Build representation for source value 
     def build
       @rn = @attributes[:right]
       do_build @attributes[:extra]
     end
+
+    # arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
+    def length
+      4
+    end
+
+    #(stays in subclases, while build is overriden to provide different arguments)
+    def do_build(arg)      
+      if arg.is_a?(Vm::StringConstant)
+        # do pc relative addressing with the difference to the instuction
+        # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
+        arg = Vm::IntegerConstant.new( arg.position - self.position - 8 )
+        @rn = :pc
+      end
+      if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
+        arg = Vm::IntegerConstant.new( arg )
+      end
+      if (arg.is_a?(Vm::IntegerConstant))
+        if (arg.integer.fits_u8?)
+          # no shifting needed
+          @operand = arg.integer
+          @i = 1
+        elsif (op_with_rot = calculate_u8_with_rr(arg))
+          @operand = op_with_rot
+          @i = 1
+          raise "hmm"
+        else
+          raise "cannot fit numeric literal argument in operand #{arg.inspect}"
+        end
+      elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer))
+        @operand = arg
+        @i = 0
+      elsif (arg.is_a?(Arm::Shift))
+        rm_ref = arg.argument
+        @i = 0
+        shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
+                    'ror' => 0b110, 'rrx' => 0b110}[arg.type]
+        if (arg.type == 'ror' and arg.value.nil?)
+          # ror #0 == rrx
+          raise "cannot rotate by zero #{arg} #{inspect}"
+        end
+  
+        arg1 = arg.value
+        if (arg1.is_a?(Vm::IntegerConstant))
+          if (arg1.value >= 32)
+            raise "cannot shift by more than 31 #{arg1} #{inspect}"
+          end
+          shift_imm = arg1.value
+        elsif (arg1.is_a?(Arm::Register))
+          shift_op val |= 0x1;
+          shift_imm = arg1.number << 1
+        elsif (arg.type == 'rrx')
+          shift_imm = 0
+        end
+        @operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
+      else
+        raise "invalid operand argument #{arg.inspect} , #{inspect}"
+      end
+    end
+
+    def assemble(io)
+      build
+      instuction_class = 0b00 # OPC_DATA_PROCESSING
+      val = (@operand.is_a?(Symbol) or @operand.is_a?(Vm::Integer)) ? reg_code(@operand) : @operand 
+      val = 0 if val == nil
+      val = shift(val , 0)
+      raise inspect unless reg_code(@first)
+      val |= shift(reg_code(@first) ,            12)     
+      val |= shift(reg_code(@rn) ,            12+4)   
+      val |= shift(@attributes[:update_status_flag] , 12+4+4)#20 
+      val |= shift(op_bit_code ,        12+4+4  +1)
+      val |= shift(@i ,                  12+4+4  +1+4) 
+      val |= shift(instuction_class ,   12+4+4  +1+4+1) 
+      val |= shift(cond_bit_code ,      12+4+4  +1+4+1+2)
+      io.write_uint32 val
+    end
+    def shift val , by
+      raise "Not integer #{val}:#{val.class}" unless val.is_a? Fixnum
+      val << by
+    end
   end
 end

lib/arm/memory_instruction.rb

@@ -6,8 +6,8 @@ module Arm
   class MemoryInstruction < Vm::MemoryInstruction
     include Arm::Constants
 
-    def initialize(left , attributes)
+    def initialize(first , attributes)
-      super(left , attributes)
+      super(first , attributes)
       @attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
       @operand = 0
@@ -75,7 +75,7 @@ module Arm
       val = @operand
       val = reg_code(@operand) if @operand.is_a?(Symbol)
       val = shift(val , 0 ) # for the test
-      val |= shift(reg_code(@left) ,        12 )  
+      val |= shift(reg_code(@first) ,        12 )  
       val |= shift(reg_code(@rn) ,        12+4) #16  
       val |= shift(@is_load ,        12+4  +4)
       val |= shift(w ,              12+4  +4+1)

lib/arm/move_instruction.rb

@@ -6,15 +6,15 @@ module Arm
     include Arm::Constants
     include LogicHelper
 
-    def initialize(left , attributes) 
+    def initialize(first , attributes) 
-      super(left , attributes)
+      super(first , attributes)
       @attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
       @attributes[:opcode] = attributes[:opcode]
       @operand = 0
 
       @i = 0      
-      @rd = @left
+      @rd = @first
       @rn = :r0 # register zero = zero bit pattern
     end
   

lib/arm/stack_instruction.rb

@@ -11,8 +11,8 @@ module Arm
       4
     end
 
-    def initialize(left , attributes)
+    def initialize(first , attributes)
-      super(left , attributes) 
+      super(first , attributes) 
       @attributes[:update_status_flag] = 0 if @attributes[:update_status_flag] == nil
       @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
       @attributes[:opcode] = attributes[:opcode]
@@ -55,7 +55,7 @@ module Arm
     private 
     # Build representation for source value
     def build
-      regs = @left
+      regs = @first
       if (regs.is_a?(Array))
         @operand = 0
         regs.each do |reg |

lib/elf/text_section.rb

@@ -10,8 +10,8 @@ module Elf
       Elf::Constants::SHT_PROGBITS
     end
 
-    def flags
+    def flags #making the text writable !gogogo
-      Elf::Constants::SHF_ALLOC | Elf::Constants::SHF_EXECINSTR
+      Elf::Constants::SHF_WRITE | Elf::Constants::SHF_ALLOC | Elf::Constants::SHF_EXECINSTR
     end
   
     def alignment

lib/vm/c_machine.rb

@@ -81,11 +81,11 @@ module Vm
     # defaults gets merged into the instructions options hash, ie passed on to the (machine specific)
     # Instruction constructor and as such can be used to influence that classes behaviour
     def define_instruction(inst , clazz , defaults = {} )
-      create_method(inst) do |left , options|
+      create_method(inst) do |first , options|
         options = {} if options == nil
         options.merge defaults
         options[:opcode] = inst
-        clazz.new(left , options)
+        clazz.new(first , options)
       end
     end
 

lib/vm/instruction.rb

@@ -25,8 +25,8 @@ module Vm
     # Make hash attributes to object attributes
     include Support::HashAttributes
     
-    def initialize left , options
+    def initialize first , options
-      @left = left
+      @first = first
       @attributes = options
     end
   end
@@ -44,7 +44,7 @@ module Vm
   class MoveInstruction < Instruction
   end
   class CallInstruction < Instruction
-    def initialize left , options
+    def initialize first , options
       super
       opcode = @attributes[:opcode].to_s
       if opcode.length == 3 and opcode[0] == "b"

lib/vm/values.rb

@@ -63,11 +63,11 @@ module Vm
       CMachine.instance.integer_less_or_equal block , self , right
     end
 
-    def plus block , left , right
+    def plus block , first , right
-      CMachine.instance.integer_plus block , self , left , right
+      CMachine.instance.integer_plus block , self , first , right
     end
-    def minus block , left , right
+    def minus block , first , right
-      CMachine.instance.integer_minus block , self , left , right
+      CMachine.instance.integer_minus block , self , first , right
     end
     
     def load block , right