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a spirited effort to make assembly repeatable

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This commit is contained in:
Torsten Ruger 2014-06-05 10:46:42 +03:00
parent 41a02a7190
commit e6e969b4e4
5 changed files with 84 additions and 79 deletions
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38
lib/arm/compare_instruction.rb
View File

@ -6,7 +6,7 @@ module Arm
super(left , right, attributes) super(left , right, attributes)
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0 @operand = 0
@i = 0 @immediate = 0
@attributes[:update_status] = 1 @attributes[:update_status] = 1
@rn = left @rn = left
@rd = :r0 @rd = :r0
@ -16,14 +16,18 @@ module Arm
4 4
end end
def build def assemble(io)
arg = @right # don't overwrite instance variables, to make assembly repeatable
rn = @rn
operand = @operand
immediate = @immediate
arg = @right
if arg.is_a?(Vm::StringConstant) if arg.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction # do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
arg = Vm::IntegerConstant.new( arg.position - self.position - 8 ) arg = Vm::IntegerConstant.new( arg.position - self.position - 8 )
@rn = :pc rn = :pc
end end
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
arg = Vm::IntegerConstant.new( arg ) arg = Vm::IntegerConstant.new( arg )
@ -31,21 +35,21 @@ module Arm
if (arg.is_a?(Vm::IntegerConstant)) if (arg.is_a?(Vm::IntegerConstant))
if (arg.integer.fits_u8?) if (arg.integer.fits_u8?)
# no shifting needed # no shifting needed
@operand = arg.integer operand = arg.integer
@i = 1 immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(arg)) elsif (op_with_rot = calculate_u8_with_rr(arg))
@operand = op_with_rot operand = op_with_rot
@i = 1 immediate = 1
raise "hmm" raise "hmm"
else else
raise "cannot fit numeric literal argument in operand #{arg.inspect}" raise "cannot fit numeric literal argument in operand #{arg.inspect}"
end end
elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer)) elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer))
@operand = arg operand = arg
@i = 0 immediate = 0
elsif (arg.is_a?(Arm::Shift)) elsif (arg.is_a?(Arm::Shift))
rm_ref = arg.argument rm_ref = arg.argument
@i = 0 immediate = 0
shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
'ror' => 0b110, 'rrx' => 0b110}[arg.type] 'ror' => 0b110, 'rrx' => 0b110}[arg.type]
if (arg.type == 'ror' and arg.value.nil?) if (arg.type == 'ror' and arg.value.nil?)
@ -65,24 +69,20 @@ module Arm
elsif (arg.type == 'rrx') elsif (arg.type == 'rrx')
shift_imm = 0 shift_imm = 0
end end
@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3) operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
else else
raise "invalid operand argument #{arg.inspect} , #{inspect}" raise "invalid operand argument #{arg.inspect} , #{inspect}"
end end
end
def assemble(io)
build
instuction_class = 0b00 # OPC_DATA_PROCESSING instuction_class = 0b00 # OPC_DATA_PROCESSING
val = (@operand.is_a?(Symbol) or @operand.is_a?(Vm::Integer)) ? reg_code(@operand) : @operand val = (operand.is_a?(Symbol) or operand.is_a?(Vm::Integer)) ? reg_code(operand) : operand
val = 0 if val == nil val = 0 if val == nil
val = shift(val , 0) val = shift(val , 0)
raise inspect unless reg_code(@rd) raise inspect unless reg_code(@rd)
val |= shift(reg_code(@rd) , 12) val |= shift(reg_code(@rd) , 12)
val |= shift(reg_code(@rn) , 12+4) val |= shift(reg_code(rn) , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1) val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(@i , 12+4+4 +1+4) val |= shift(immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
io.write_uint32 val io.write_uint32 val

32
lib/arm/logic_instruction.rb
View File

@ -18,14 +18,18 @@ module Arm
4 4
end end
# Build representation for source value def assemble(io)
def build # don't overwrite instance variables, to make assembly repeatable
left = @left
operand = @operand
immediate = @immediate
right = @right right = @right
if @left.is_a?(Vm::StringConstant) if @left.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction # do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute) # 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
right = @left.position - self.position - 8 right = @left.position - self.position - 8
@left = :pc left = :pc
end end
# automatic wrapping, for machine internal code and testing # automatic wrapping, for machine internal code and testing
if( right.is_a? Fixnum ) if( right.is_a? Fixnum )
@ -34,34 +38,30 @@ module Arm
if (right.is_a?(Vm::IntegerConstant)) if (right.is_a?(Vm::IntegerConstant))
if (right.integer.fits_u8?) if (right.integer.fits_u8?)
# no shifting needed # no shifting needed
@operand = right.integer operand = right.integer
@immediate = 1 immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(right)) elsif (op_with_rot = calculate_u8_with_rr(right))
@operand = op_with_rot operand = op_with_rot
@immediate = 1 immediate = 1
raise "hmm" raise "hmm"
else else
raise "cannot fit numeric literal argument in operand #{right.inspect}" raise "cannot fit numeric literal argument in operand #{right.inspect}"
end end
elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer)) elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
@operand = reg_code(right) #integer means the register the integer is in (otherwise constant) operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
@immediate = 0 # ie not immediate is register immediate = 0 # ie not immediate is register
else else
raise "invalid operand argument #{right.inspect} , #{inspect}" raise "invalid operand argument #{right.inspect} , #{inspect}"
end end
end
def assemble(io)
build
op = shift_handling op = shift_handling
instuction_class = 0b00 # OPC_DATA_PROCESSING instuction_class = 0b00 # OPC_DATA_PROCESSING
val = shift(@operand , 0) val = shift(operand , 0)
val |= shift(op , 0) # any barral action, is already shifted val |= shift(op , 0) # any barral action, is already shifted
val |= shift(reg_code(@result) , 12) val |= shift(reg_code(@result) , 12)
val |= shift(reg_code(@left) , 12+4) val |= shift(reg_code(left) , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1) val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(@immediate , 12+4+4 +1+4) val |= shift(immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
io.write_uint32 val io.write_uint32 val

53
lib/arm/memory_instruction.rb
View File

@ -22,25 +22,29 @@ module Arm
4 4
end end
# Build representation for target address def assemble(io)
def build # don't overwrite instance variables, to make assembly repeatable
rn = @rn
operand = @operand
add_offset = @add_offset
arg = @left arg = @left
arg = "r#{arg.register}".to_sym if( arg.is_a? Vm::Word ) arg = "r#{arg.register}".to_sym if( arg.is_a? Vm::Word )
#str / ldr are _serious instructions. With BIG possibilities not half are implemented #str / ldr are _serious instructions. With BIG possibilities not half are implemented
if (arg.is_a?(Symbol)) #symbol is register if (arg.is_a?(Symbol)) #symbol is register
@rn = arg rn = arg
if @right if @right
@operand = @right operand = @right
#TODO better test, this operand integer (register) does not work. but sleep first #TODO better test, this operand integer (register) does not work. but sleep first
@operand = @operand.register if @operand.is_a? Vm::Integer operand = operand.register if operand.is_a? Vm::Integer
unless( @operand.is_a? Symbol) unless( operand.is_a? Symbol)
puts "operand #{@operand.inspect}" puts "operand #{operand.inspect}"
if (@operand < 0) if (operand < 0)
@add_offset = 0 add_offset = 0
#TODO test/check/understand #TODO test/check/understand
@operand *= -1 operand *= -1
else else
@add_offset = 1 add_offset = 1
end end
if (@operand.abs > 4095) if (@operand.abs > 4095)
raise "reference offset too large/small (max 4095) #{arg} #{inspect}" raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
@ -48,13 +52,14 @@ module Arm
end end
end end
elsif (arg.is_a?(Vm::StringConstant) ) #use pc relative elsif (arg.is_a?(Vm::StringConstant) ) #use pc relative
@rn = :pc rn = :pc
@operand = arg.position - self.position - 8 #stringtable is after code operand = arg.position - self.position - 8 #stringtable is after code
@add_offset = 1 add_offset = 1
if (@operand.abs > 4095) if (operand.abs > 4095)
raise "reference offset too large/small (max 4095) #{arg} #{inspect}" raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
end end
elsif( arg.is_a?(Vm::IntegerConstant) ) elsif( arg.is_a?(Vm::IntegerConstant) )
#TODO untested brach, probably not working
raise "is this working ?? #{arg} #{inspect}" raise "is this working ?? #{arg} #{inspect}"
@pre_post_index = 1 @pre_post_index = 1
@rn = pc @rn = pc
@ -63,36 +68,32 @@ module Arm
else else
raise "invalid operand argument #{arg.inspect} #{inspect}" raise "invalid operand argument #{arg.inspect} #{inspect}"
end end
end
def assemble(io)
build
#not sure about these 2 constants. They produce the correct output for str r0 , r1 #not sure about these 2 constants. They produce the correct output for str r0 , r1
# but i can't help thinking that that is because they are not used in that instruction and # but i can't help thinking that that is because they are not used in that instruction and
# so it doesn't matter. Will see # so it doesn't matter. Will see
@add_offset = 1 add_offset = 1
# TODO to be continued # TODO to be continued
@add_offset = 0 if @attributes[:add_offset] add_offset = 0 if @attributes[:add_offset]
@pre_post_index = 1 @pre_post_index = 1
@pre_post_index = 0 if @attributes[:flaggie] @pre_post_index = 0 if @attributes[:flaggie]
w = 0 #W flag w = 0 #W flag
byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
instuction_class = 0b01 # OPC_MEMORY_ACCESS instuction_class = 0b01 # OPC_MEMORY_ACCESS
if @operand.is_a?(Symbol) if operand.is_a?(Symbol)
val = reg_code(@operand) val = reg_code(operand)
@pre_post_index = 0 @pre_post_index = 0
i = 1 # not quite sure about this, but it gives the output of as. read read read. i = 1 # not quite sure about this, but it gives the output of as. read read read.
else else
i = 0 #I flag (third bit) i = 0 #I flag (third bit)
val = @operand val = operand
end end
val = shift(val , 0 ) # for the test val = shift(val , 0 ) # for the test
val |= shift(reg_code(@result) , 12 ) val |= shift(reg_code(@result) , 12 )
val |= shift(reg_code(@rn) , 12+4) #16 val |= shift(reg_code(rn) , 12+4) #16
val |= shift(@is_load , 12+4 +4) val |= shift(@is_load , 12+4 +4)
val |= shift(w , 12+4 +4+1) val |= shift(w , 12+4 +4+1)
val |= shift(byte_access , 12+4 +4+1+1) val |= shift(byte_access , 12+4 +4+1+1)
val |= shift(@add_offset , 12+4 +4+1+1+1) val |= shift(add_offset , 12+4 +4+1+1+1)
val |= shift(@pre_post_index, 12+4 +4+1+1+1+1)#24 val |= shift(@pre_post_index, 12+4 +4+1+1+1+1)#24
val |= shift(i , 12+4 +4+1+1+1+1 +1) val |= shift(i , 12+4 +4+1+1+1+1 +1)
val |= shift(instuction_class,12+4 +4+1+1+1+1 +1+1) val |= shift(instuction_class,12+4 +4+1+1+1+1 +1+1)

31
lib/arm/move_instruction.rb
View File

@ -23,13 +23,18 @@ module Arm
4 4
end end
def build def assemble(io)
# don't overwrite instance variables, to make assembly repeatable
rn = @rn
operand = @operand
immediate = @immediate
right = @from right = @from
if right.is_a?(Vm::StringConstant) if right.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction # do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
right = Vm::IntegerConstant.new( right.position - self.position - 8 ) right = Vm::IntegerConstant.new( right.position - self.position - 8 )
@rn = :pc rn = :pc
end end
if( right.is_a? Fixnum ) if( right.is_a? Fixnum )
right = Vm::IntegerConstant.new( right ) right = Vm::IntegerConstant.new( right )
@ -37,34 +42,30 @@ module Arm
if (right.is_a?(Vm::IntegerConstant)) if (right.is_a?(Vm::IntegerConstant))
if (right.integer.fits_u8?) if (right.integer.fits_u8?)
# no shifting needed # no shifting needed
@operand = right.integer operand = right.integer
@immediate = 1 immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(right)) elsif (op_with_rot = calculate_u8_with_rr(right))
@operand = op_with_rot operand = op_with_rot
@immediate = 1 immediate = 1
raise "hmm" raise "hmm"
else else
raise "cannot fit numeric literal argument in operand #{right.inspect}" raise "cannot fit numeric literal argument in operand #{right.inspect}"
end end
elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer)) elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
@operand = reg_code(right) #integer means the register the integer is in (otherwise constant) operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
@immediate = 0 # ie not immediate is register immediate = 0 # ie not immediate is register
else else
raise "invalid operand argument #{right.inspect} , #{inspect}" raise "invalid operand argument #{right.inspect} , #{inspect}"
end end
end
def assemble(io)
build
op = shift_handling op = shift_handling
instuction_class = 0b00 # OPC_DATA_PROCESSING instuction_class = 0b00 # OPC_DATA_PROCESSING
val = shift(@operand , 0) val = shift(operand , 0)
val |= shift(op , 0) # any barral action, is already shifted val |= shift(op , 0) # any barral action, is already shifted
val |= shift(reg_code(@to) , 12) val |= shift(reg_code(@to) , 12)
val |= shift(reg_code(@rn) , 12+4) val |= shift(reg_code(rn) , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1) val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(@immediate , 12+4+4 +1+4) val |= shift(immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
io.write_uint32 val io.write_uint32 val

9
lib/arm/stack_instruction.rb
View File

@ -25,11 +25,14 @@ module Arm
end end
def assemble(io) def assemble(io)
# don't overwrite instance variables, to make assembly repeatable
operand = @operand
if (@first.is_a?(Array)) if (@first.is_a?(Array))
@operand = 0 operand = 0
@first.each do |r| @first.each do |r|
raise "nil register in push, index #{r}- #{inspect}" if r.nil? raise "nil register in push, index #{r}- #{inspect}" if r.nil?
@operand |= (1 << reg_code(r)) operand |= (1 << reg_code(r))
end end
else else
raise "invalid operand argument #{inspect}" raise "invalid operand argument #{inspect}"
@ -48,7 +51,7 @@ module Arm
cond = @attributes[:condition_code].is_a?(Symbol) ? COND_CODES[@attributes[:condition_code]] : @attributes[:condition_code] cond = @attributes[:condition_code].is_a?(Symbol) ? COND_CODES[@attributes[:condition_code]] : @attributes[:condition_code]
@rn = :sp # sp register @rn = :sp # sp register
#assemble of old #assemble of old
val = @operand val = operand
val |= (reg_code(@rn) << 16) val |= (reg_code(@rn) << 16)
val |= (is_pop << 16+4) #20 val |= (is_pop << 16+4) #20
val |= (write_base << 16+4+ 1) val |= (write_base << 16+4+ 1)