diff --git a/lib/arm/compare_instruction.rb b/lib/arm/compare_instruction.rb index f05302e8..e57c4dbe 100644 --- a/lib/arm/compare_instruction.rb +++ b/lib/arm/compare_instruction.rb @@ -6,7 +6,7 @@ module Arm super(left , right, attributes) @attributes[:condition_code] = :al if @attributes[:condition_code] == nil @operand = 0 - @i = 0 + @immediate = 0 @attributes[:update_status] = 1 @rn = left @rd = :r0 @@ -16,14 +16,18 @@ module Arm 4 end - def build - arg = @right + def assemble(io) + # don't overwrite instance variables, to make assembly repeatable + rn = @rn + operand = @operand + immediate = @immediate + arg = @right if arg.is_a?(Vm::StringConstant) # do pc relative addressing with the difference to the instuction # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) arg = Vm::IntegerConstant.new( arg.position - self.position - 8 ) - @rn = :pc + rn = :pc end if( arg.is_a? Fixnum ) #HACK to not have to change the code just now arg = Vm::IntegerConstant.new( arg ) @@ -31,21 +35,21 @@ module Arm if (arg.is_a?(Vm::IntegerConstant)) if (arg.integer.fits_u8?) # no shifting needed - @operand = arg.integer - @i = 1 + operand = arg.integer + immediate = 1 elsif (op_with_rot = calculate_u8_with_rr(arg)) - @operand = op_with_rot - @i = 1 + operand = op_with_rot + immediate = 1 raise "hmm" else raise "cannot fit numeric literal argument in operand #{arg.inspect}" end elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer)) - @operand = arg - @i = 0 + operand = arg + immediate = 0 elsif (arg.is_a?(Arm::Shift)) rm_ref = arg.argument - @i = 0 + immediate = 0 shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}[arg.type] if (arg.type == 'ror' and arg.value.nil?) @@ -65,24 +69,20 @@ module Arm elsif (arg.type == 'rrx') shift_imm = 0 end - @operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3) + operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3) else raise "invalid operand argument #{arg.inspect} , #{inspect}" end - end - - def assemble(io) - build instuction_class = 0b00 # OPC_DATA_PROCESSING - val = (@operand.is_a?(Symbol) or @operand.is_a?(Vm::Integer)) ? reg_code(@operand) : @operand + val = (operand.is_a?(Symbol) or operand.is_a?(Vm::Integer)) ? reg_code(operand) : operand val = 0 if val == nil val = shift(val , 0) raise inspect unless reg_code(@rd) val |= shift(reg_code(@rd) , 12) - val |= shift(reg_code(@rn) , 12+4) + val |= shift(reg_code(rn) , 12+4) val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(op_bit_code , 12+4+4 +1) - val |= shift(@i , 12+4+4 +1+4) + val |= shift(immediate , 12+4+4 +1+4) val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) io.write_uint32 val diff --git a/lib/arm/logic_instruction.rb b/lib/arm/logic_instruction.rb index 2151dc10..b8cef6ec 100644 --- a/lib/arm/logic_instruction.rb +++ b/lib/arm/logic_instruction.rb @@ -18,14 +18,18 @@ module Arm 4 end - # Build representation for source value - def build + def assemble(io) + # don't overwrite instance variables, to make assembly repeatable + left = @left + operand = @operand + immediate = @immediate + right = @right if @left.is_a?(Vm::StringConstant) # do pc relative addressing with the difference to the instuction # 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute) right = @left.position - self.position - 8 - @left = :pc + left = :pc end # automatic wrapping, for machine internal code and testing if( right.is_a? Fixnum ) @@ -34,34 +38,30 @@ module Arm if (right.is_a?(Vm::IntegerConstant)) if (right.integer.fits_u8?) # no shifting needed - @operand = right.integer - @immediate = 1 + operand = right.integer + immediate = 1 elsif (op_with_rot = calculate_u8_with_rr(right)) - @operand = op_with_rot - @immediate = 1 + operand = op_with_rot + immediate = 1 raise "hmm" else raise "cannot fit numeric literal argument in operand #{right.inspect}" end elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer)) - @operand = reg_code(right) #integer means the register the integer is in (otherwise constant) - @immediate = 0 # ie not immediate is register + operand = reg_code(right) #integer means the register the integer is in (otherwise constant) + immediate = 0 # ie not immediate is register else raise "invalid operand argument #{right.inspect} , #{inspect}" end - end - - def assemble(io) - build op = shift_handling instuction_class = 0b00 # OPC_DATA_PROCESSING - val = shift(@operand , 0) + val = shift(operand , 0) val |= shift(op , 0) # any barral action, is already shifted val |= shift(reg_code(@result) , 12) - val |= shift(reg_code(@left) , 12+4) + val |= shift(reg_code(left) , 12+4) val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(op_bit_code , 12+4+4 +1) - val |= shift(@immediate , 12+4+4 +1+4) + val |= shift(immediate , 12+4+4 +1+4) val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) io.write_uint32 val diff --git a/lib/arm/memory_instruction.rb b/lib/arm/memory_instruction.rb index 2f75fdb9..5006ff9f 100644 --- a/lib/arm/memory_instruction.rb +++ b/lib/arm/memory_instruction.rb @@ -22,25 +22,29 @@ module Arm 4 end - # Build representation for target address - def build + def assemble(io) + # don't overwrite instance variables, to make assembly repeatable + rn = @rn + operand = @operand + add_offset = @add_offset + arg = @left arg = "r#{arg.register}".to_sym if( arg.is_a? Vm::Word ) #str / ldr are _serious instructions. With BIG possibilities not half are implemented if (arg.is_a?(Symbol)) #symbol is register - @rn = arg + rn = arg if @right - @operand = @right + operand = @right #TODO better test, this operand integer (register) does not work. but sleep first - @operand = @operand.register if @operand.is_a? Vm::Integer - unless( @operand.is_a? Symbol) - puts "operand #{@operand.inspect}" - if (@operand < 0) - @add_offset = 0 + operand = operand.register if operand.is_a? Vm::Integer + unless( operand.is_a? Symbol) + puts "operand #{operand.inspect}" + if (operand < 0) + add_offset = 0 #TODO test/check/understand - @operand *= -1 + operand *= -1 else - @add_offset = 1 + add_offset = 1 end if (@operand.abs > 4095) raise "reference offset too large/small (max 4095) #{arg} #{inspect}" @@ -48,13 +52,14 @@ module Arm end end elsif (arg.is_a?(Vm::StringConstant) ) #use pc relative - @rn = :pc - @operand = arg.position - self.position - 8 #stringtable is after code - @add_offset = 1 - if (@operand.abs > 4095) + rn = :pc + operand = arg.position - self.position - 8 #stringtable is after code + add_offset = 1 + if (operand.abs > 4095) raise "reference offset too large/small (max 4095) #{arg} #{inspect}" end elsif( arg.is_a?(Vm::IntegerConstant) ) + #TODO untested brach, probably not working raise "is this working ?? #{arg} #{inspect}" @pre_post_index = 1 @rn = pc @@ -63,36 +68,32 @@ module Arm else raise "invalid operand argument #{arg.inspect} #{inspect}" end - end - - def assemble(io) - build #not sure about these 2 constants. They produce the correct output for str r0 , r1 # but i can't help thinking that that is because they are not used in that instruction and # so it doesn't matter. Will see - @add_offset = 1 + add_offset = 1 # TODO to be continued - @add_offset = 0 if @attributes[:add_offset] + add_offset = 0 if @attributes[:add_offset] @pre_post_index = 1 @pre_post_index = 0 if @attributes[:flaggie] w = 0 #W flag byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag instuction_class = 0b01 # OPC_MEMORY_ACCESS - if @operand.is_a?(Symbol) - val = reg_code(@operand) + if operand.is_a?(Symbol) + val = reg_code(operand) @pre_post_index = 0 i = 1 # not quite sure about this, but it gives the output of as. read read read. else i = 0 #I flag (third bit) - val = @operand + val = operand end val = shift(val , 0 ) # for the test val |= shift(reg_code(@result) , 12 ) - val |= shift(reg_code(@rn) , 12+4) #16 + val |= shift(reg_code(rn) , 12+4) #16 val |= shift(@is_load , 12+4 +4) val |= shift(w , 12+4 +4+1) val |= shift(byte_access , 12+4 +4+1+1) - val |= shift(@add_offset , 12+4 +4+1+1+1) + val |= shift(add_offset , 12+4 +4+1+1+1) val |= shift(@pre_post_index, 12+4 +4+1+1+1+1)#24 val |= shift(i , 12+4 +4+1+1+1+1 +1) val |= shift(instuction_class,12+4 +4+1+1+1+1 +1+1) diff --git a/lib/arm/move_instruction.rb b/lib/arm/move_instruction.rb index bbc3319b..336d8f76 100644 --- a/lib/arm/move_instruction.rb +++ b/lib/arm/move_instruction.rb @@ -23,13 +23,18 @@ module Arm 4 end - def build + def assemble(io) + # don't overwrite instance variables, to make assembly repeatable + rn = @rn + operand = @operand + immediate = @immediate + right = @from if right.is_a?(Vm::StringConstant) # do pc relative addressing with the difference to the instuction # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) right = Vm::IntegerConstant.new( right.position - self.position - 8 ) - @rn = :pc + rn = :pc end if( right.is_a? Fixnum ) right = Vm::IntegerConstant.new( right ) @@ -37,34 +42,30 @@ module Arm if (right.is_a?(Vm::IntegerConstant)) if (right.integer.fits_u8?) # no shifting needed - @operand = right.integer - @immediate = 1 + operand = right.integer + immediate = 1 elsif (op_with_rot = calculate_u8_with_rr(right)) - @operand = op_with_rot - @immediate = 1 + operand = op_with_rot + immediate = 1 raise "hmm" else raise "cannot fit numeric literal argument in operand #{right.inspect}" end elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer)) - @operand = reg_code(right) #integer means the register the integer is in (otherwise constant) - @immediate = 0 # ie not immediate is register + operand = reg_code(right) #integer means the register the integer is in (otherwise constant) + immediate = 0 # ie not immediate is register else raise "invalid operand argument #{right.inspect} , #{inspect}" end - end - - def assemble(io) - build op = shift_handling instuction_class = 0b00 # OPC_DATA_PROCESSING - val = shift(@operand , 0) + val = shift(operand , 0) val |= shift(op , 0) # any barral action, is already shifted val |= shift(reg_code(@to) , 12) - val |= shift(reg_code(@rn) , 12+4) + val |= shift(reg_code(rn) , 12+4) val |= shift(@attributes[:update_status] , 12+4+4)#20 val |= shift(op_bit_code , 12+4+4 +1) - val |= shift(@immediate , 12+4+4 +1+4) + val |= shift(immediate , 12+4+4 +1+4) val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) io.write_uint32 val diff --git a/lib/arm/stack_instruction.rb b/lib/arm/stack_instruction.rb index 527efb7a..19a9f1a7 100644 --- a/lib/arm/stack_instruction.rb +++ b/lib/arm/stack_instruction.rb @@ -25,11 +25,14 @@ module Arm end def assemble(io) + # don't overwrite instance variables, to make assembly repeatable + operand = @operand + if (@first.is_a?(Array)) - @operand = 0 + operand = 0 @first.each do |r| raise "nil register in push, index #{r}- #{inspect}" if r.nil? - @operand |= (1 << reg_code(r)) + operand |= (1 << reg_code(r)) end else raise "invalid operand argument #{inspect}" @@ -48,7 +51,7 @@ module Arm cond = @attributes[:condition_code].is_a?(Symbol) ? COND_CODES[@attributes[:condition_code]] : @attributes[:condition_code] @rn = :sp # sp register #assemble of old - val = @operand + val = operand val |= (reg_code(@rn) << 16) val |= (is_pop << 16+4) #20 val |= (write_base << 16+4+ 1)