removed some obsolete builder helpers
cleaner code with dsl, just div10 undone
This commit is contained in:
parent
99a95d40a6
commit
d74e9c2c40
@ -142,27 +142,6 @@ module Risc
|
|||||||
|
|
||||||
end
|
end
|
||||||
|
|
||||||
# load receiver and the first argument (int)
|
|
||||||
# return both registers
|
|
||||||
def self_and_int_arg( source )
|
|
||||||
me = add_known( :receiver )
|
|
||||||
int_arg = load_int_arg_at(source , 0 )
|
|
||||||
return me , int_arg
|
|
||||||
end
|
|
||||||
|
|
||||||
# Load the first argument, assumed to be integer
|
|
||||||
def load_int_arg_at( source , at)
|
|
||||||
int_arg = compiler.use_reg :Integer
|
|
||||||
add_slot_to_reg(source , Risc.message_reg , :arguments , int_arg )
|
|
||||||
add_slot_to_reg(source , int_arg , at + 1, int_arg ) #1 for type
|
|
||||||
return int_arg
|
|
||||||
end
|
|
||||||
|
|
||||||
# assumed Integer in given register is replaced by the fixnum that it is holding
|
|
||||||
def reduce_int( source , register )
|
|
||||||
add_slot_to_reg( source + "int -> fix" , register , Parfait::Integer.integer_index , register)
|
|
||||||
end
|
|
||||||
|
|
||||||
# for computationally building code (ie writing assembler) these short cuts
|
# for computationally building code (ie writing assembler) these short cuts
|
||||||
# help to instantiate risc instructions and add them immediately
|
# help to instantiate risc instructions and add them immediately
|
||||||
[:label, :reg_to_slot , :slot_to_reg , :load_constant, :load_data,
|
[:label, :reg_to_slot , :slot_to_reg , :load_constant, :load_data,
|
||||||
@ -177,28 +156,6 @@ module Risc
|
|||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
def add_known(name)
|
|
||||||
case name
|
|
||||||
when :receiver
|
|
||||||
message = Risc.message_reg
|
|
||||||
ret_type = compiler.slot_type(:receiver, message.type)
|
|
||||||
ret = compiler.use_reg( ret_type )
|
|
||||||
add_slot_to_reg(" load self" , message , :receiver , ret )
|
|
||||||
return ret
|
|
||||||
when :space
|
|
||||||
space = Parfait.object_space
|
|
||||||
reg = compiler.use_reg :Space , space
|
|
||||||
add_load_constant( "load space", space , reg )
|
|
||||||
return reg
|
|
||||||
when :message
|
|
||||||
reg = compiler.use_reg :Message
|
|
||||||
add_transfer( "load message", Risc.message_reg , reg )
|
|
||||||
return reg
|
|
||||||
else
|
|
||||||
raise "Unknow expression #{name}"
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
end
|
end
|
||||||
|
|
||||||
|
|
||||||
|
@ -75,17 +75,24 @@ module Risc
|
|||||||
compiler.add_mom( Mom::ReturnSequence.new)
|
compiler.add_mom( Mom::ReturnSequence.new)
|
||||||
return compiler
|
return compiler
|
||||||
end
|
end
|
||||||
|
|
||||||
|
def add_receiver(builder)
|
||||||
|
message = Risc.message_reg
|
||||||
|
ret_type = builder.compiler.receiver_type
|
||||||
|
ret = builder.compiler.use_reg( ret_type )
|
||||||
|
builder.add_slot_to_reg(" load self" , message , :receiver , ret )
|
||||||
|
builder.add_slot_to_reg( "int -> fix" , ret , Parfait::Integer.integer_index , ret)
|
||||||
|
return ret
|
||||||
|
end
|
||||||
|
|
||||||
def div10( context )
|
def div10( context )
|
||||||
s = "div_10 "
|
s = "div_10 "
|
||||||
compiler = compiler_for(:Integer,:div10 ,{})
|
compiler = compiler_for(:Integer,:div10 ,{})
|
||||||
builder = compiler.compiler_builder(compiler.source)
|
builder = compiler.compiler_builder(compiler.source)
|
||||||
#FIX: this could load receiver once, reduce and then transfer twice
|
#FIX: this could load receiver once, reduce and then transfer twice
|
||||||
me = builder.add_known( :receiver )
|
me = add_receiver( builder )
|
||||||
tmp = builder.add_known( :receiver )
|
tmp = add_receiver( builder )
|
||||||
q = builder.add_known( :receiver )
|
q = add_receiver( builder )
|
||||||
builder.reduce_int( s , me )
|
|
||||||
builder.reduce_int( s , tmp )
|
|
||||||
builder.reduce_int( s , q )
|
|
||||||
const = compiler.use_reg :fixnum , value: 1
|
const = compiler.use_reg :fixnum , value: 1
|
||||||
builder.add_load_data( s , 1 , const )
|
builder.add_load_data( s , 1 , const )
|
||||||
# int tmp = self >> 1
|
# int tmp = self >> 1
|
||||||
|
@ -84,8 +84,9 @@ module Risc
|
|||||||
# Used by exit and __init__ (so it doesn't have to call it)
|
# Used by exit and __init__ (so it doesn't have to call it)
|
||||||
def exit_sequence(builder)
|
def exit_sequence(builder)
|
||||||
save_message( builder )
|
save_message( builder )
|
||||||
builder.add_slot_to_reg "get return" , Risc.message_reg , :return_value , Risc.message_reg
|
message = Risc.message_reg
|
||||||
builder.reduce_int( "reduce return" , Risc.message_reg)
|
builder.add_slot_to_reg "get return" , message , :return_value , message
|
||||||
|
builder.add_slot_to_reg( "reduce return" , message , Parfait::Integer.integer_index , message)
|
||||||
builder.add_code Syscall.new("emit_syscall(exit)", :exit )
|
builder.add_code Syscall.new("emit_syscall(exit)", :exit )
|
||||||
end
|
end
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user