give arm own instruction base class back
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@ -38,6 +38,7 @@ module Arm
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end
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end
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require_relative "constants"
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require_relative "constants"
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require_relative "instructions/instruction"
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require_relative "instructions/call_instruction"
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require_relative "instructions/call_instruction"
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require_relative "instructions/compare_instruction"
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require_relative "instructions/compare_instruction"
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require_relative "instructions/logic_instruction"
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require_relative "instructions/logic_instruction"
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@ -9,9 +9,7 @@ module Arm
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# swi (SoftWareInterrupt) or system call is how we call the kernel.
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# swi (SoftWareInterrupt) or system call is how we call the kernel.
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# in Arm the register layout is different and so we have to place the syscall code into register 7
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# in Arm the register layout is different and so we have to place the syscall code into register 7
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# Riscs 0-6 hold the call values as for a normal c call
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# Riscs 0-6 hold the call values as for a normal c call
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class CallInstruction < Risc::Branch
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class CallInstruction < Instruction
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include Constants
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include Attributed
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def initialize(first, attributes)
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def initialize(first, attributes)
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super(nil, nil)
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super(nil, nil)
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@ -1,7 +1,5 @@
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module Arm
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module Arm
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class CompareInstruction < Risc::Instruction
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class CompareInstruction < Instruction
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include Constants
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include Attributed
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def initialize(left , right , attributes)
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def initialize(left , right , attributes)
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super(nil)
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super(nil)
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35
lib/arm/instructions/instruction.rb
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35
lib/arm/instructions/instruction.rb
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@ -0,0 +1,35 @@
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require "util/list"
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module Arm
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# Arm instruction base class
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# Mostly linked list functionality that all instructions have
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class Instruction
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include Constants
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include Attributed
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include Util::List
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def initialize( source , nekst = nil )
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@source = source
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@next = nekst
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return unless source
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raise "Source must be string or Instruction, not #{source.class}" unless source.is_a?(String) or source.is_a?(Mom::Instruction)
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end
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attr_reader :source
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def total_byte_length
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ret = 0
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self.each{|ins| ret += ins.byte_length}
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ret
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end
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def set_position( position )
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Positioned.set_position(self,position)
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position += byte_length
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if self.next
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self.next.set_position( position )
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else
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position
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end
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end
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end
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end
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@ -1,7 +1,5 @@
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module Arm
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module Arm
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class LogicInstruction < Risc::Instruction
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class LogicInstruction < Instruction
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include Constants
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include Attributed
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# result = left op right #or constant loading
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# result = left op right #or constant loading
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#
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#
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@ -62,7 +60,7 @@ module Arm
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# Arm can't load any large (over 1024) numbers, or larger with fancy shifting,
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# Arm can't load any large (over 1024) numbers, or larger with fancy shifting,
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# but then the lower bits must be 0's. Especially in constant loading random large numbers
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# but then the lower bits must be 0's. Especially in constant loading random large numbers
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# happen, and so they are split into two instructions. An exection is thrown, that triggers
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# happen, and so they are split into two instructions. An exeption is thrown, that triggers
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# some position handling and an @extra add instruction generated.
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# some position handling and an @extra add instruction generated.
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def handle_numeric(right)
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def handle_numeric(right)
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if (right.fits_u8?)
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if (right.fits_u8?)
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@ -2,9 +2,7 @@ module Arm
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# ADDRESSING MODE 2
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# ADDRESSING MODE 2
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# Implemented: immediate offset with offset=0
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# Implemented: immediate offset with offset=0
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class MemoryInstruction < Risc::Instruction
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class MemoryInstruction < Instruction
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include Constants
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include Attributed
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def initialize result , left , right = nil , attributes = {}
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def initialize result , left , right = nil , attributes = {}
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super(nil)
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super(nil)
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@ -46,7 +44,7 @@ module Arm
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# but gnu as produces same output for auto_inc or not, so that seems broken
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# but gnu as produces same output for auto_inc or not, so that seems broken
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# luckily auto_inc is not used and even if it clobbers unused reg in soml, but still
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# luckily auto_inc is not used and even if it clobbers unused reg in soml, but still
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val = shift(val , 0 )
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val = shift(val , 0 )
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val |= shift(reg_code(arg) , 16)
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val |= shift(reg_code(arg) , 16)
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val |= shift(i , 25)
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val |= shift(i , 25)
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write_val(val, io)
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write_val(val, io)
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@ -1,9 +1,7 @@
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module Arm
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module Arm
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class MoveInstruction < Risc::Instruction
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class MoveInstruction < Instruction
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include Constants
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include Attributed
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def initialize to , from , options = {}
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def initialize( to , from , options = {})
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super(nil)
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super(nil)
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@attributes = options
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@attributes = options
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if( from.is_a?(Symbol) and Risc::RiscValue.look_like_reg(from) )
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if( from.is_a?(Symbol) and Risc::RiscValue.look_like_reg(from) )
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@ -1,9 +1,7 @@
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module Arm
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module Arm
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# ADDRESSING MODE 4
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# ADDRESSING MODE 4
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class StackInstruction < Risc::Instruction
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class StackInstruction < Instruction
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include Constants
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include Attributed
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def initialize(first , attributes)
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def initialize(first , attributes)
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super(nil)
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super(nil)
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