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whitespace round plusses

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Torsten Ruger
2016-12-14 19:57:09 +02:00
parent 27e7a362db
commit c1d23a8d48
5 changed files with 35 additions and 35 deletions
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12
lib/arm/instructions/logic_instruction.rb
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@ -84,12 +84,12 @@ module Arm
val = shift(operand , 0)
val |= shift(op , 0) # any barrel action, is already shifted
val |= shift(result , 12)
val |= shift(left_code , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 + 1)
val |= shift(immediate , 12+4+4 + 1+4)
val |= shift(instuction_class , 12+4+4 + 1+4+1)
val |= shift(cond_bit_code , 12+4+4 + 1+4+1+2)
val |= shift(left_code , 12 + 4)
val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
val |= shift(op_bit_code , 12 + 4 + 4 + 1)
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
val |= shift(instuction_class , 12 + 4 + 4 + 1 + 4 + 1)
val |= shift(cond_bit_code , 12 + 4 + 4 + 1 + 4 + 1 + 2)
io.write_uint32 val
# by now we have the extra add so assemble that
if(@extra)