whitespace round plusses

This commit is contained in:
Torsten Ruger
2016-12-14 19:57:09 +02:00
parent 27e7a362db
commit c1d23a8d48
5 changed files with 35 additions and 35 deletions

View File

@ -58,12 +58,12 @@ module Arm
val = shift(val , 0)
raise inspect unless reg_code(@rd)
val |= shift(reg_code(@rd) , 12)
val |= shift(reg_code(rn) , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
val |= shift(reg_code(rn) , 12 + 4)
val |= shift(@attributes[:update_status] , 12 + 4 + 4)#20
val |= shift(op_bit_code , 12 + 4 + 4 + 1)
val |= shift(immediate , 12 + 4 + 4 + 1 + 4)
val |= shift(instuction_class , 12 + 4 + 4 + 1 + 4 + 1)
val |= shift(cond_bit_code , 12 + 4 + 4 + 1 + 4 + 1 + 2)
io.write_uint32 val
end
@ -92,7 +92,7 @@ module Arm
# elsif (arg.type == 'rrx')
# shift_imm = 0
# end
# operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
# operand = rm_ref | (shift_op << 4) | (shift_imm << 4 +3)
end
def to_s
"#{opcode} #{@left} , #{@right} #{super}"