rename RiscTransfer to Transfer
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@ -31,7 +31,7 @@ module Arm
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ArmMachine.str( :lr , code.register , arm_index(code) )
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end
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def translate_RiscTransfer( code )
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def translate_Transfer( code )
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# Risc machine convention is from => to
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# But arm has the receiver/result as the first
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ArmMachine.mov( code.to , code.from)
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@ -7,7 +7,7 @@ module Risc
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# This is because that is what cpu's can do. In programming terms this would be accessing
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# an element in an array, in the case of RegToSlot setting the register in the array.
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# btw: to move data between registers, use RiscTransfer
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# btw: to move data between registers, use Transfer
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class RegToSlot < Setter
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@ -7,7 +7,7 @@ module Risc
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# This is because that is what cpu's can do. In programming terms this would be accessing
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# an element in an array, in the case of SlotToReg setting the value in the array.
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# btw: to move data between registers, use RiscTransfer
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# btw: to move data between registers, use Transfer
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class SlotToReg < Getter
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@ -1,6 +1,6 @@
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module Risc
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# transfer the constents of one register to another.
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# Transfer the constents of one register to another.
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# possibly called move in some cpus
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# There are other instructions to move data from / to memory, namely SlotToReg and RegToSlot
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@ -10,13 +10,13 @@ module Risc
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# Also it is used for moving temorary data
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#
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class RiscTransfer < Instruction
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class Transfer < Instruction
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# initialize with from and to registers.
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# First argument from
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# second argument to
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#
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# Note: this may be reversed from some assembler notations (also arm)
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def initialize source , from , to
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def initialize( source , from , to )
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super(source)
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@from = from
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@to = to
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@ -26,10 +26,10 @@ module Risc
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attr_reader :from, :to
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def to_s
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"RiscTransfer: #{from} -> #{to}"
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"Transfer: #{from} -> #{to}"
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end
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end
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def self.transfer( source , from , to)
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RiscTransfer.new( source , from , to)
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Transfer.new( source , from , to)
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end
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end
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@ -184,7 +184,7 @@ module Risc
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true
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end
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def execute_RiscTransfer
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def execute_Transfer
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value = get_register @instruction.from
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set_register @instruction.to , value
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true
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@ -22,11 +22,11 @@ module Rubyx
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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SlotToReg, RegToSlot, SlotToReg, LoadConstant, RegToSlot,
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LoadConstant, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, RiscTransfer, FunctionCall, Label,
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LoadConstant, RegToSlot, Transfer, FunctionCall, Label,
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LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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RiscTransfer, Syscall, RiscTransfer, RiscTransfer, RegToSlot,
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Label, FunctionReturn, RiscTransfer, SlotToReg, SlotToReg,
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Label, FunctionReturn, RiscTransfer, Syscall, NilClass]
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Transfer, Syscall, Transfer, Transfer, RegToSlot,
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Label, FunctionReturn, Transfer, SlotToReg, SlotToReg,
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Label, FunctionReturn, Transfer, Syscall, NilClass]
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end
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def test_overflow
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@ -21,7 +21,7 @@ HERE
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check_chain [Branch, Label, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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LoadConstant, OperatorInstruction, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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end
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@ -32,7 +32,7 @@ HERE
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end
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def pest_transfer
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transfer = ticks 19
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assert_equal RiscTransfer , transfer.class
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assert_equal Transfer , transfer.class
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assert_equal @interpreter.get_register(transfer.to) , @interpreter.get_register(transfer.from)
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end
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@ -26,11 +26,11 @@ HERE
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LoadConstant, RegToSlot, LoadConstant, RegToSlot, LoadConstant,
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SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, SlotToReg, RegToSlot, LoadConstant, RegToSlot,
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RiscTransfer, FunctionCall, Label, LoadConstant, SlotToReg,
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Transfer, FunctionCall, Label, LoadConstant, SlotToReg,
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RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
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SlotToReg, RegToByte, Label, FunctionReturn, RiscTransfer,
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SlotToReg, RegToByte, Label, FunctionReturn, Transfer,
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SlotToReg, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
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Label, FunctionReturn, RiscTransfer, Syscall, NilClass]
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Label, FunctionReturn, Transfer, Syscall, NilClass]
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end
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def pest_branch
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@ -38,17 +38,17 @@ HERE
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LoadConstant, RegToSlot, FunctionCall, Label, SlotToReg,
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SlotToReg, RegToSlot, LoadConstant, RegToSlot, LoadConstant,
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SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, RiscTransfer, FunctionCall, Label,
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LoadConstant, RegToSlot, Transfer, FunctionCall, Label,
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LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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LoadConstant, OperatorInstruction, IsZero, SlotToReg, LoadConstant,
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RegToSlot, LoadConstant, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, LoadConstant, RegToSlot, RiscTransfer, FunctionCall,
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RegToSlot, LoadConstant, RegToSlot, Transfer, FunctionCall,
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Label, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, RiscTransfer, Syscall, RiscTransfer, RiscTransfer,
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RegToSlot, Label, FunctionReturn, RiscTransfer, SlotToReg,
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SlotToReg, Transfer, Syscall, Transfer, Transfer,
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RegToSlot, Label, FunctionReturn, Transfer, SlotToReg,
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SlotToReg, Branch, Label, Label, FunctionReturn,
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RiscTransfer, SlotToReg, SlotToReg, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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Transfer, SlotToReg, SlotToReg, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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end
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end
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@ -40,7 +40,7 @@ module Risc
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check_chain [Branch, Label, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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LoadConstant, OperatorInstruction, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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end
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@ -22,7 +22,7 @@ HERE
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check_chain [Branch, Label, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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LoadConstant, OperatorInstruction, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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check_return 0
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end
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@ -21,7 +21,7 @@ HERE
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check_chain [Branch, Label, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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LoadConstant, OperatorInstruction, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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check_return 0
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end
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@ -21,12 +21,12 @@ HERE
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check_chain [Branch, Label, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, FunctionCall, Label, SlotToReg,
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LoadConstant, RegToSlot, LoadConstant, RegToSlot, LoadConstant,
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SlotToReg, RegToSlot, LoadConstant, RegToSlot, RiscTransfer,
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SlotToReg, RegToSlot, LoadConstant, RegToSlot, Transfer,
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FunctionCall, Label, LoadConstant, SlotToReg, RegToSlot,
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SlotToReg, SlotToReg, RiscTransfer, Syscall, RiscTransfer,
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RiscTransfer, RegToSlot, Label, FunctionReturn, RiscTransfer,
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SlotToReg, SlotToReg, Transfer, Syscall, Transfer,
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Transfer, RegToSlot, Label, FunctionReturn, Transfer,
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SlotToReg, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
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Label, FunctionReturn, RiscTransfer, Syscall, NilClass]
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Label, FunctionReturn, Transfer, Syscall, NilClass]
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end
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def pest_branch
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@ -25,11 +25,11 @@ HERE
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LoadConstant, RegToSlot, FunctionCall, Label, SlotToReg,
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LoadConstant, RegToSlot, LoadConstant, RegToSlot, LoadConstant,
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SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
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LoadConstant, RegToSlot, RiscTransfer, FunctionCall, Label,
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LoadConstant, RegToSlot, Transfer, FunctionCall, Label,
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LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
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SlotToReg, ByteToReg, RegToSlot, Label, FunctionReturn,
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RiscTransfer, SlotToReg, SlotToReg, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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Transfer, SlotToReg, SlotToReg, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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end
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@ -30,12 +30,12 @@ HERE
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LoadConstant, RegToSlot, FunctionCall, Label, LoadConstant,
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LoadConstant, OperatorInstruction, IsZero, SlotToReg, LoadConstant,
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RegToSlot, LoadConstant, RegToSlot, LoadConstant, SlotToReg,
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RegToSlot, LoadConstant, RegToSlot, RiscTransfer, FunctionCall,
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RegToSlot, LoadConstant, RegToSlot, Transfer, FunctionCall,
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Label, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
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SlotToReg, RiscTransfer, Syscall, RiscTransfer, RiscTransfer,
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RegToSlot, Label, FunctionReturn, RiscTransfer, SlotToReg,
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SlotToReg, Transfer, Syscall, Transfer, Transfer,
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RegToSlot, Label, FunctionReturn, Transfer, SlotToReg,
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SlotToReg, Branch, Label, LoadConstant, SlotToReg,
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RegToSlot, Label, FunctionReturn, RiscTransfer, Syscall,
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RegToSlot, Label, FunctionReturn, Transfer, Syscall,
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NilClass]
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end
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end
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