adjusted module name accordingly
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module Vm
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module Register
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# Base class for anything that we can assemble
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# Base class for anything that we can assemble
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# Derived classes include instructions and constants(data)
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# Derived classes include instructions and constants(data)
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require_relative "code"
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require_relative "code"
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module Vm
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module Register
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# Because the idea of what one instruction does, does not always map one to one to real machine
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# Because the idea of what one instruction does, does not always map one to one to real machine
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# instructions, and instruction may link to another instruction thus creating an arbitrary list
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# instructions, and instruction may link to another instruction thus creating an arbitrary list
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module Vm
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module Register
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class Integer < Word
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class Integer < Word
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# needs to be here as Word's constructor is private (to make it abstract)
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# needs to be here as Word's constructor is private (to make it abstract)
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def initialize reg
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def initialize reg
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module Vm
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module Register
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class Mystery < Word
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class Mystery < Word
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# needs to be here as Word's constructor is private (to make it abstract)
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# needs to be here as Word's constructor is private (to make it abstract)
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def initilize reg
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def initilize reg
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module Vm
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module Register
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# Passes, or BlockPasses, could have been procs that just get each block passed.
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# Passes, or BlockPasses, could have been procs that just get each block passed.
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# Instead they are proper objects in case they want to save state.
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# Instead they are proper objects in case they want to save state.
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# The idea is
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# The idea is
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module Vm
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module Register
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class Reference < Word
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class Reference < Word
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# needs to be here as Word's constructor is private (to make it abstract)
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# needs to be here as Word's constructor is private (to make it abstract)
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def initialize reg , clazz = nil
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def initialize reg , clazz = nil
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module Vm
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module Register
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# Our virtual c-machine has a number of registers of a given size and uses a stack
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# Our virtual c-machine has a number of registers of a given size and uses a stack
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# So much so standard
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# So much so standard
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module Vm
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module Register
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# RegisterReference is not the name for a register, "only" for a certain use of it.
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# RegisterReference is not the name for a register, "only" for a certain use of it.
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# In a way it is like a variable name, a storage location. The location is a register off course,
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# In a way it is like a variable name, a storage location. The location is a register off course,
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