also redid the get/set internal byte with builder
had to pimp register value to use a semblance of the dsl using <= for bytes and << for words
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@ -140,6 +140,15 @@ module Risc
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return ins
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end
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# similar to above (<< which produces slot_to_reg), this produces byte_to_reg
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# since << covers all other cases, this must have a RValue as the right
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def <=( right )
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raise "not implemented for #{right.class}:#{right}" unless right.is_a?( RValue )
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ins = Risc.byte_to_reg("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , right.index , self)
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builder.add_code(ins) if builder
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return ins
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end
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def -( right )
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raise "operators only on registers, not #{right.class}" unless right.is_a? RegisterValue
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op = Risc.op("#{self.type} - #{right.type}", :- , self , right )
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@ -187,6 +196,15 @@ module Risc
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reg_to_slot
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end
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# similar to above (<< which produces reg_to_slot), this produces reg_to_byte
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# from itself (the slot) and the register given
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def <=( reg )
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raise "not reg #{reg}" unless reg.is_a?(RegisterValue)
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reg_to_byte = Risc.reg_to_byte("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg , register, index)
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builder.add_code(reg_to_byte) if builder
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reg_to_byte
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end
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end
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# The register we use to store the current message object is :r0
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