This commit is contained in:
Torsten Ruger 2014-10-05 01:13:57 +03:00
parent a99e2602ae
commit 965e5f2a0f
4 changed files with 14 additions and 6 deletions

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@ -1,7 +1,7 @@
module Register
# return from a function call
#register and index specify where the return address is stored
# register and index specify where the return address is stored
class FunctionReturn < Instruction
def initialize register , index

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@ -3,6 +3,9 @@ module Register
# save the return address of a call
# register and index specify where the return address is stored
# This instruction exists mainly, so we don't have to hard-code where the machine stores the
# address. In arm that is a register, but intel may (?) push it, and who knows, what other machines do.
class SaveReturn < Instruction
def initialize register , index
@register = register

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@ -35,6 +35,7 @@ module Virtual
@classes.values.each do |c|
c.instance_methods.each {|f| all += f.blocks }
end
#puts "running #{pass_class}"
all.each do |block|
pass = eval pass_class
raise "no such pass-class as #{pass_class}" unless pass
@ -52,10 +53,14 @@ module Virtual
end
end
# Passes are initiated empty and added to by anyone who want (basically)
# Even linking and assembly are passes and so there are quite a few system passes neccesary to result in a
# working binary. Other than that, this is intentionally quite flexible
# Passes are initiated empty and added to by anyone who wants (basically)
# This is intentionally quite flexible, though one sometimes has to watch the order of them
# most ordering is achieved by ordering the requires and using add_pass
# but more precise control is possible with the _after and _before versions
def add_pass pass
@passes << pass
end
def add_pass_after( pass , after)
index = @passes.index(after)
raise "No such pass (#{pass}) to add after: #{after}" unless index

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@ -44,7 +44,7 @@ module Virtual
inspect
end
def mem_length
raise "abstract #{self}"
raise "abstract #{self.class}"
end
@@EMPTY = { :names => [] , :types => []}
def layout