Starting to build detailed mom to risc test

so we can get rid of brittle risc folder tests
All of those tests rely on many many implementation details
should just test result through interpreter, no chain.
This commit is contained in:
Torsten Rüger 2019-09-15 17:44:35 +03:00
parent d913bb01de
commit 6f108f67d7
4 changed files with 79 additions and 9 deletions

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@ -6,4 +6,31 @@ module Mom
super("mocking")
end
end
class MomInstructionTest < MiniTest::Test
include Output
def setup
Parfait.boot!(Parfait.default_test_options)
@instruction = instruction
@compiler = Risc::MethodCompiler.new(FakeCallable.new , Label.new("source","start"))
@instruction.to_risc(@compiler)
@risc = @compiler.risc_instructions
end
def risc(at)
return @risc if at == 0
@risc.next( at )
end
def all
ret = []
@risc.each {|i| ret << i}
ret
end
def all_str
class_list(all.collect{|i|i.class})
end
end
end

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@ -0,0 +1,36 @@
require_relative "helper"
module Mom
class TestDynamicCall < MomInstructionTest
def instruction
DynamicCall.new(nil,nil)
end
def test_len
assert_equal 9 , all.length , all_str
end
def test_1_load
assert_load risc(1) , Risc::Label , :r1
end
def test_2_slot
assert_slot_to_reg risc(2) ,:r0 , 1 , :r2
end
def test_3_reg
assert_reg_to_slot risc(3) , :r1 , :r2 , 4
end
def test_4_slot
assert_slot_to_reg risc(4) ,:r0 , 1 , :r0
end
def test_5_load
assert_load risc(5) , Parfait::CacheEntry , :r3
end
def test_6_slot
assert_slot_to_reg risc(6) ,:r3 , 2 , :r3
end
def test_7_jump
assert_equal Risc::DynamicJump , risc(7).class
end
def test_8_label
assert_label risc(8) , "continue_"
end
end
end

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@ -6,19 +6,18 @@ module Risc
def setup
@preload = "Integer.div4"
@input = "return @nil_object.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg, #5
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg, #10
@input = "arg = 1 ;return arg.div4"
@expect = [LoadConstant, RegToSlot, LoadConstant, SlotToReg, SlotToReg, #5
SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, #10
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg, #15
SlotToReg, Label, LoadConstant, OperatorInstruction, IsZero, #20
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch, #25
Label, LoadConstant, SlotToReg, Transfer, Syscall, #30
Transfer, Transfer, SlotToReg, RegToSlot, Label, #35
RegToSlot, Label, LoadConstant, SlotToReg, SlotToReg, #40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, RegToSlot, #45
LoadConstant, SlotToReg, RegToSlot, SlotToReg, LoadConstant, #50
SlotToReg, DynamicJump, Label, SlotToReg, RegToSlot, #55
Branch,] #60
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, #45
SlotToReg, RegToSlot, SlotToReg, LoadConstant, SlotToReg, #50
DynamicJump, Label, SlotToReg, RegToSlot, Branch,] #55
end
def test_return_instructions
@ -26,11 +25,11 @@ module Risc
end
def test_function_return
produced = produce_body
assert_equal Branch , produced.next(55).class
assert_equal Branch , produced.next(54).class
end
def test_cache_check
produced = produce_body
assert_equal IsZero , produced.next(6).class
assert_equal IsZero , produced.next(7).class
end
end
end

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@ -22,5 +22,13 @@ module Minitest
assert_equal from , transfer.from.symbol
assert_equal to , transfer.to.symbol
end
def assert_label( label , name )
assert_equal Risc::Label , label.class
if(name[-1] == "_")
assert label.name.start_with?(name) , "Label does not start with #{name}:#{label.name}"
else
assert_equal name , label.name
end
end
end
end