removing unconditional

just Branch is fine

lib/mom/instruction/jump.rb

@@ -1,9 +1,9 @@
 module Mom
 
-  # Unconditional jump to the Label given
+  # Branch jump to the Label given
   # Eg used at the end of while or end of if_true branch
   #
-  # Risc equivalent is the same really, called Unconditional there.
+  # Risc equivalent is the same really, called Branch there.
   #
   class Jump < Instruction
     attr_reader :label
@@ -12,7 +12,7 @@ module Mom
       @label = label
     end
     def to_risc(compiler)
-      Risc::Unconditional.new(self , @label.to_risc(compiler))
+      Risc::Branch.new(self , @label.to_risc(compiler))
     end
   end
 

lib/risc/instructions/branch.rb

@@ -17,7 +17,7 @@ module Risc
 
   end
 
-  # dynamic version of an Unconditional branch that jumps to the contents
+  # dynamic version of an Branch branch that jumps to the contents
   # of a register instead of a hardcoded address
   # As Branches jump to Labels, this is not derived from Branch
   # PS: to conditionally jump to a dynamic adddress we do a normal branch
@@ -31,10 +31,6 @@ module Risc
     attr_reader :register
   end
 
-  class Unconditional < Branch
-
-  end
-
   class IsZero < Branch
   end
 

test/mom/test_if_else.rb

@@ -9,7 +9,7 @@ module Risc
       @input = "if(@a) ; arg = 5 ; else; arg = 6; end"
       @expect = [SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero ,
                  LoadConstant, OperatorInstruction, IsNotZero, Label, LoadConstant ,
-                 SlotToReg, RegToSlot, Unconditional, Label, LoadConstant ,
+                 SlotToReg, RegToSlot, Branch, Label, LoadConstant ,
                  SlotToReg, RegToSlot, Label]
     end
 

test/mom/test_while.rb

@@ -9,7 +9,7 @@ module Risc
       @input = "while(@a) ; arg = 5 end"
       @expect = [Label, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction ,
                  IsNotZero, LoadConstant, OperatorInstruction, IsNotZero, LoadConstant ,
-                 SlotToReg, RegToSlot, Unconditional, Label]
+                 SlotToReg, RegToSlot, Branch, Label]
     end
 
     def test_while_instructions