little more attribute filing
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@ -8,7 +8,6 @@ module Arm
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def initialize(attributes)
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super(attributes)
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@attributes[:condition_code] = :al
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@attributes[:opcode] = attributes[:opcode]
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@operand = 0
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@i = 0
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@attributes[:update_status_flag] = 1
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@ -10,7 +10,6 @@ module Arm
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super(attributes)
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@attributes[:update_status_flag] = 0
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@attributes[:condition_code] = :al
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@attributes[:opcode] = attributes[:opcode]
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@operand = 0
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@rn = nil
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@ -10,14 +10,10 @@ module Arm
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super(attributes)
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@attributes[:update_status_flag] = 0
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@attributes[:condition_code] = :al
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@attributes[:opcode] = attributes[:opcode]
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@operand = 0
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@i = 0 #I flag (third bit)
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@pre_post_index = 0 #P flag
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@add_offset = 0 #U flag
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@byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
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@w = 0 #W flag
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@is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
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@rn = :r0 # register zero = zero bit pattern
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@rd = :r0 # register zero = zero bit pattern
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@ -73,21 +69,24 @@ module Arm
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def assemble(io)
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build
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i = 0 #I flag (third bit)
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#not sure about these 2 constants. They produce the correct output for str r0 , r1
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# but i can't help thinking that that is because they are not used in that instruction and
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# so it doesn't matter. Will see
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@add_offset = 1
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@pre_post_index = 1
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w = 0 #W flag
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byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
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instuction_class = 0b01 # OPC_MEMORY_ACCESS
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val = @operand.is_a?(Symbol) ? reg_code(@operand) : @operand
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val |= (reg_code(@rd) << 12 )
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val |= (reg_code(@rn) << 12+4) #16
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val |= (@is_load << 12+4 +4)
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val |= (@w << 12+4 +4+1)
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val |= (@byte_access << 12+4 +4+1+1)
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val |= (w << 12+4 +4+1)
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val |= (byte_access << 12+4 +4+1+1)
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val |= (@add_offset << 12+4 +4+1+1+1)
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val |= (@pre_post_index << 12+4 +4+1+1+1+1)#24
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val |= (@i << 12+4 +4+1+1+1+1 +1)
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val |= (i << 12+4 +4+1+1+1+1 +1)
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val |= (instuction_class<<12+4 +4+1+1+1+1 +1+1)
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val |= (cond_bit_code << 12+4 +4+1+1+1+1 +1+1+2)
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io.write_uint32 val
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