From 5b002c0ff63b525a968af212ed8a690c2ef7a9f2 Mon Sep 17 00:00:00 2001
From: Torsten Ruger <torsten@villataika.fi>
Date: Sat, 10 May 2014 16:08:53 +0300
Subject: [PATCH] little more attribute filing

---
 lib/arm/compare_instruction.rb |  1 -
 lib/arm/logic_instruction.rb   |  1 -
 lib/arm/memory_instruction.rb  | 13 ++++++-------
 3 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/lib/arm/compare_instruction.rb b/lib/arm/compare_instruction.rb
index d47e9ed2..4706007a 100644
--- a/lib/arm/compare_instruction.rb
+++ b/lib/arm/compare_instruction.rb
@@ -8,7 +8,6 @@ module Arm
     def initialize(attributes)
       super(attributes) 
       @attributes[:condition_code] = :al
-      @attributes[:opcode] = attributes[:opcode]
       @operand = 0
       @i = 0      
       @attributes[:update_status_flag] = 1
diff --git a/lib/arm/logic_instruction.rb b/lib/arm/logic_instruction.rb
index e42100bd..f82c8028 100644
--- a/lib/arm/logic_instruction.rb
+++ b/lib/arm/logic_instruction.rb
@@ -10,7 +10,6 @@ module Arm
       super(attributes)
       @attributes[:update_status_flag] = 0
       @attributes[:condition_code] = :al
-      @attributes[:opcode] = attributes[:opcode]
       @operand = 0
 
       @rn = nil
diff --git a/lib/arm/memory_instruction.rb b/lib/arm/memory_instruction.rb
index 85c50d72..3144eaee 100644
--- a/lib/arm/memory_instruction.rb
+++ b/lib/arm/memory_instruction.rb
@@ -10,14 +10,10 @@ module Arm
       super(attributes)
       @attributes[:update_status_flag] = 0
       @attributes[:condition_code] = :al
-      @attributes[:opcode] = attributes[:opcode]
       @operand = 0
 
-      @i = 0 #I flag (third bit)
       @pre_post_index = 0 #P flag
       @add_offset = 0 #U flag
-      @byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
-      @w = 0 #W flag
       @is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
       @rn = :r0 # register zero = zero bit pattern
       @rd = :r0 # register zero = zero bit pattern
@@ -73,21 +69,24 @@ module Arm
 
     def assemble(io)
       build
+      i = 0 #I flag (third bit)
       #not sure about these 2 constants. They produce the correct output for str r0 , r1
       # but i can't help thinking that that is because they are not used in that instruction and
       # so it doesn't matter. Will see
       @add_offset = 1
       @pre_post_index = 1
+      w = 0 #W flag
+      byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
       instuction_class =  0b01 # OPC_MEMORY_ACCESS
       val = @operand.is_a?(Symbol) ? reg_code(@operand) : @operand 
       val |= (reg_code(@rd) <<        12 )  
       val |= (reg_code(@rn) <<        12+4) #16  
       val |= (@is_load <<        12+4  +4)
-      val |= (@w <<              12+4  +4+1)
-      val |= (@byte_access <<    12+4  +4+1+1)
+      val |= (w <<              12+4  +4+1)
+      val |= (byte_access <<    12+4  +4+1+1)
       val |= (@add_offset <<     12+4  +4+1+1+1)
       val |= (@pre_post_index << 12+4  +4+1+1+1+1)#24
-      val |= (@i <<              12+4  +4+1+1+1+1  +1) 
+      val |= (i <<              12+4  +4+1+1+1+1  +1) 
       val |= (instuction_class<<12+4  +4+1+1+1+1  +1+1)  
       val |= (cond_bit_code <<  12+4  +4+1+1+1+1  +1+1+2)
       io.write_uint32 val