add register reference where symbols are allowed
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@ -25,7 +25,7 @@ module Arm
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arg = @left
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arg = @left
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arg = arg.symbol if( arg.is_a? ::Register::RegisterReference )
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arg = arg.symbol if( arg.is_a? ::Register::RegisterReference )
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#str / ldr are _serious instructions. With BIG possibilities not half are implemented
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#str / ldr are _serious instructions. With BIG possibilities not half are implemented
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if (arg.is_a?(Symbol)) #symbol is register
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if (arg.is_a?(Symbol) or arg.is_a?(::Register::RegisterReference)) #symbol is register
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rn = arg
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rn = arg
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if @right
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if @right
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operand = @right
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operand = @right
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@ -73,7 +73,7 @@ module Arm
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w = 0 #W flag
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w = 0 #W flag
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byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
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byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
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instuction_class = 0b01 # OPC_MEMORY_ACCESS
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instuction_class = 0b01 # OPC_MEMORY_ACCESS
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if operand.is_a?(Symbol)
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if (operand.is_a?(Symbol) or operand.is_a?(::Register::RegisterReference))
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val = reg_code(operand)
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val = reg_code(operand)
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@pre_post_index = 0
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@pre_post_index = 0
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i = 1 # not quite sure about this, but it gives the output of as. read read read.
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i = 1 # not quite sure about this, but it gives the output of as. read read read.
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@ -65,7 +65,7 @@ module Arm
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raise "only simple 2 byte implemented #{self.inspect}" if operand > 255
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raise "only simple 2 byte implemented #{self.inspect}" if operand > 255
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@extra = ::Register::RegisterMachine.instance.add( to , to , (right.integer && 0xFF) , shift_lsr: 8)
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@extra = ::Register::RegisterMachine.instance.add( to , to , (right.integer && 0xFF) , shift_lsr: 8)
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end
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end
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elsif (right.is_a?(Symbol))
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elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterReference))
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operand = reg_code(right)
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operand = reg_code(right)
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immediate = 0 # ie not immediate is register
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immediate = 0 # ie not immediate is register
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else
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else
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